TMS416160, TMS416160P, TMS418160, TMS418160P

TMS426160, TMS426160P, TMS428160, TMS428160P

1048576-WORD BY 16-BIT HIGH-SPEED DRAMS

SMKS160C – MAY 1995 – REVISED NOVEMBER 1995

7

POST OFFICE BOX 1443

TMS4x8160P

A low-power battery-backup refresh mode that requires less than 600

µA (5 V) or 350 µA (3.3 V) refresh current

is available on the TMS4x8160P. Data integrity is maintained using xCBR refresh with a period of 125

µs while

holding RAS low for less than 300 ns. To minimize current consumption, all input levels must be at CMOS levels

self refresh ( TMS4xx160P)

The self-refresh mode is entered by dropping xCAS low prior to RAS going low. Then xCAS and RAS are both

held low for a minimum of 100

µs. The chip is then refreshed internally by an on-board oscillator. No external

address is required because the CBR counter is used to keep track of the address. To exit the self-refresh mode,

a full set of row addresses) must be executed before continuing with normal operation. The burst refresh

ensures the DRAM is fully refreshed.

power up

To achieve proper device operation, an initial pause of 200

µs followed by a minimum of eight initialization cycles

(RAS-only or xCBR) cycle.

TMS41x160, TMS41x160P

– 1 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . .

TMS42x160, TMS42x160P

– 0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . .

Voltage range on any pin (see Note 1): TMS41x160, TMS41x160P

– 1 V to 7 V

. . . . . . . . . . . . . . . . . . . . . . .

TMS42x160, TMS42x160P

– 0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . .

Short-circuit output current

50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power dissipation

1 W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

0

°C to 70°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–55

°C to 125°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to VSS.

recommended operating conditions

TMS41x160

TMS42x160

UNIT

MIN

NOM

MAX

MIN

NOM

MAX

UNIT

VCC

Supply voltage

4.5

5

5.5

3

3.3

3.6

V

VSS

Supply voltage

0

0

V

VIH

High-level input voltage

2.4

6.5

2

VCC + 0.3

V

VIL

Low-level input voltage (see Note 2)

–1

0.8

– 0.3

0.8

V

TA

Operating free-air temperature

0

70

0

70

°C

NOTE 2: The algebraic convention, where the more negative (less positive) limit is designated as minimum, is used for logic-voltage levels only.