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ADM2483BRW-REEL Datasheet(PDF) 8 Page - Analog Devices |
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ADM2483BRW-REEL Datasheet(HTML) 8 Page - Analog Devices |
8 / 20 page ADM2483 Rev. 0 | Page 8 of 20 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NC = NO CONNECT ADM2483 TOP VIEW (Not to Scale) VDD1 1 VDD2 16 GND1* 2 GND2* 15 RxD 3 NC 14 RE 4 B 13 DE 5 A 12 TxD 6 NC 11 PV 7 NC 10 GND1* 8 GND2* 9 * PINS 2 AND 8 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND1. PINS 9 AND 15 ARE INTERNALLY CONNECTED. EITHER OR BOTH MAY BE USED FOR GND2. Figure 2. Pin Configuration Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 VDD1 Power Supply (Logic Side). 2, 8 GND1 Ground (Logic Side). 3 RxD Receiver Output Data. This output is high when (A − B) > 200 mV, and low when (A − B) < −200 mV. There is tristate output when the receiver is disabled, i.e., when RE is driven high. 4 RE Receiver Enable Input. This is an active-low input. Driving this input low enables the receiver, and driving it high disables the receiver. 5 DE Driver Enable Input. Driving this input high enables the driver, and driving it low disables the driver. 6 TxD Transmit Data Input. Data to be transmitted by the driver is applied to this input. 7 PV Power Valid. Used during power-up and power-down. See the Applications Information section. 9, 15 GND2 Ground (Bus Side). 10, 14 NC No Connect. 12 A Noninverting Driver Output/Receiver Input. When the driver is disabled, or VDD1 or VDD2 is powered down, Pin A is put in a high impedance state to avoid overloading the bus. 13 B Inverting Driver Output/Receiver Input. 16 VDD2 Power Supply (Bus Side). |
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