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8019AS.doc
2001-05-10
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SPECIFICATION
RTL8019AS
19
CONFIG1: RTL8019AS Configuration Register 1 (04H; Type=R except Bit7=R/W)
Bit
Symbol
Description
7
IRQEN
IRQ Enable:
This bit controls the state of the interrupt request line selected by IRQS2-0. If this bit
is set, the interrupt line goes high upon an interrupt request and will be low when
there is no interrupt request.
The interrupt line will be forced to tri-state if this bit is reset.
This bit's power-up initial value is 1 and may be modified by software if
EEM1=EEM0=1 in 9346CR register.
6-4
IRQS2-0
IRQ Select :
These 3 bits select one of INT7-0 to reflect the RTL8019AS's interrupt request status.
All unselected interrupt lines will be tri-stated.
IRQS2
IRQS1
IRQS0
Interrupt Line
Assigned ISA IRQ
0
0
0
INT0
IRQ2/9
0
0
1
INT1
IRQ3
0
1
0
INT2
IRQ4
0
1
1
INT3
IRQ5
1
0
0
INT4
IRQ10
1
0
1
INT5
IRQ11
1
1
0
INT6
IRQ12
1
1
1
INT7
IRQ15
3-0
IOS3-0
Select I/O base address.
IOS3
IOS2
IOS1
IOS0
I/O Base
0
0
0
0
300H
0
0
0
1
320H
0
0
1
0
340H
0
0
1
1
360H
1
0
0
0
380H
1
0
0
1
3A0H
1
0
1
0
3C0H
1
0
1
1
3E0H
0
1
0
0
200H
0
1
0
1
220H
0
1
1
0
240H
0
1
1
1
260H
1
1
0
0
280H
1
1
0
1
2A0H
1
1
1
0
2C0H
1
1
1
1
2E0H
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