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TAA2009 Datasheet(HTML) 5 Page - Tripath Technology Inc.

Part No. TAA2009
Description  STEREO 9W (8Ω) CLASS-T™ DIGITAL AUDIO AMPLIFIER USING DIGITAL POWER PROCESSING™ TECHNOLOGY
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Maker  TRIPATH [Tripath Technology Inc.]
Homepage  http://www.etelos.com/
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TAA2009 Datasheet(HTML) 5 Page - Tripath Technology Inc.

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Tripath Technology, Inc. - Technical Information
5
TAA2009 –KLi/1.02/ 05.06
P I N DE SCRI PTI ON
Pin
Function
Description
1, 24
IN1P, IN2P
Positive audio input for channel 1 and channel 2
2, 28
V5D, V5A
Digital 5VDC, Analog 5VDC
3, 22
GAIN0, GAIN1
Gain select bits. GAIN0 is least significant bit. See Applications Information for
programmable gain values. Both GAIN 0 and GAIN1 have internal 50K
Ω pull-
down resistors.
4
DGND
Digital Ground. Connect to AGND locally (near the TAA2009).
5
REF
Internal reference voltage; approximately 1.0 VDC.
6
SLEEP
When set to logic high, device goes into low power mode. If not used, this pin
should be grounded
7
MUTE
When set to logic high, both amplifiers are muted and in idle mode. When low
(grounded), both amplifiers are fully operational. If left floating, the device stays in
the mute mode. This pin should be tied to GND if not used.
8
FAULT
A logic high output indicates an under-voltage condition, thermal overload, and an
output is shorted to ground, or another output.
9, 12
16, 13
OUTP1 & OUTM1
OUTP2 & OUTM2
Bridged output pairs
10, 15
VDD1, VDD2
Supply pins for high current H-bridges, nominally 12VDC.
11, 14
PGND1, PGND2
Power Grounds (high current)
17
SUB
Substrate connection. Connect to PGND.
18
CPUMP
Charge pump input (nominally 10V above VDDA)
19
DCAP
Charge pump switching output pin. DCAP is a free running 350kHz square wave
between VDDA and DGND (12Vpp nominal).
20
VDDA
Power supply for analog VDD circuitry. Connect to same supply as VDD1 and
VDD2.
21
5VGEN
Regulated 5VDC source used to supply power to the input section (pins 2 and 28).
23, 30
AGND, AGND
Analog Ground. Connect all pins together directly at the TAA2009.
25, 32
IN2M, IN1M
Negative audio input for channel 2 and channel 1.
26, 31
C2, C1
Pop minimization capacitor. Use 10uF.
27
INL
Modulation selection pin. Connecting the INL pin to a logic high level enables the
inductor-less mode. This mode allows the TAA2009 to be operated without an
output filter as the switching outputs are in phase with zero input. If INL is tied to
a logic low or left floating (pulled down via internal 50K
Ω resistor to ground), the
INL mode will be disabled. This results in a differential output switching pattern
typical of previous Tripath generation parts such as TA2024 and TAA2008. The
state of the INL pin should only be changed with MUTE at a logic high state.
29
BIASCAP
Input stage bias voltage (approximately 2.4VDC).


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