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IS61LV3216-20K Datasheet(PDF) 4 Page - Integrated Silicon Solution, Inc

Part # IS61LV3216-20K
Description  32K x 16 LOW VOLTAGE CMOS STATIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS61LV3216-20K Datasheet(HTML) 4 Page - Integrated Silicon Solution, Inc

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IS61LV3216
ISSI®
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
04/17/01
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-10
-12
-15
-20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tRC
Read Cycle Time
10
12
15
20
ns
tAA
Address Access Time
10
12
15
20
ns
tOHA
Output Hold Time
3
3
3
3
ns
tACE
CE Access Time
10
12
15
20
ns
tDOE
OE Access Time
5
6
7
8ns
tHZOE(2) OE to High-Z Output
0
5
0
6
0
7
0
8
ns
tLZOE(2)
OE to Low-Z Output
0
0
0
0
ns
tHZCE(2
CE to High-Z Output
0
5
0
6
0
7
0
8
ns
tLZCE(2)
CE to Low-Z Output
4
4
4
4
ns
tBA
LB, UB Access Time
5
6
7
8ns
tHZB
LB, UB to High-Z Output
0
5
0
6
0
7
0
8
ns
tLZB
LB, UB to Low-Z Output
5
5
5
5
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
3 ns
Input and Output Timing
1.5V
and Reference Level
Output Load
See Figures 1a and 1b
AC TEST LOADS
Figure 1a.
Figure 1b.
319
30 pF
Including
jig and
scope
353
OUTPUT
3.3V
319
5 pF
Including
jig and
scope
353
OUTPUT
3.3V
CAPACITANCE(1)
Symbol
Parameter
Conditions
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
pF
COUT
Input/Output Capacitance
VOUT = 0V
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.


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