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CMM3566-LC

Features

❏ 7.0V Bias Voltage

❏ +24 dBm Linear Output Power (W-CDMA)

❏ 30 dB Gain at Operating Output

❏ Tested Under Digital Modulation (W-CDMA)

❏ Leadless Chip Carrier (LCC) Package

Applications

❏ Wireless Local Loop Subscriber Units

❏ Wireless Local Loop Base Stations

Description

The CMM3566-LC is a 7.0 V, +24 dBm, linear

power amplifier intended for use in PCS handsets and wireless

local loop subscriber units and base stations. The amplifier is

biased to meet the requirements of linear modulation systems

of W-CDMA.

The CMM3566-LC is packaged in a low-cost, space

efficient, power package that provides excellent electrical sta-

bility and low thermal resistance. The part requires minimal

external circuitry for bias and matching to reduce space and

cost.

3.45 to 3.5 GHz

7.0V, +24 dBm

W-CDMA Power Amplifier

Preliminary Product Information

November 2000

(1 of 4)

Ground Tab

Vg3 1

RF IN 4

Vg2 2

Vg1 3

7 RF OUT/+Vd3

8 RF OUT/+Vd3

5 Vd1

6 Vd2

Ground Tab

Functional Block Diagram

Absolute Maximum Ratings

Parameter

Rating

Parameter

Rating

Parameter

Rating

Drain Voltage (+Vd)

+8 V*

Power Dissipation

5 W

Operating Temperature

-30°C to +90°C

Drain Current (Id)

1.0 A

Thermal Resistance

20°C/W

Channel Temperature

150°C

RF Input Power

0 dBm*

Storage Temperature

-65°C to +150°C

Soldering Temperature

240°C for 5 Sec.

DC Gate Voltage (-Vg)

-4.0 V*

BVGD

18 V

Recommended Operating Conditions

Parameter

Typ

Units

Parameter

Typ

Units

Drain Voltage (+Vd)

7.0

Volts

Operating Temperature (PC Board)

-40 to +70

°C

* Max (+Vd) and (-Vg) under linear operation. Max potential difference across the device at 1dB gain compression point (2Vd + |-Vg|) not to exceed the minimum breakdown voltage (BVGD) of +18V.

Application Information

The CMM3566-LC is a three stage amplifier that requires a

positive and a negative supply voltages for proper operation. It is

essential when turning on the device that the negative supply be

applied before the positive supply. When turning the device off,

the positive supply should be removed before the negative supply

is removed.

The CMM3566-LC can be operated over a range of supply

voltages and bias currents. It is important that the maximum power

dissipation specification for the package be observed at all times

and that the maximum voltage across the device not be exceeded.

Circuit Design Considerations

Biasing Three negative voltages are needed to set the bias current

of the 3-stage GaAs FET power amplifier. The first stage bias is

controlled via Vg1. The second stage bias is controlled via Vg2.

The output stage is controlled via Vg3. The recommended divider

networks for each gate bias shown in the schematic. The positive

supply voltage is applied to pins 5, 6, 7 and 8. The negative volt-

age supplies control the quiescent current of the device. The quies-

cent current needs to be set at the level specified in order to get the

guaranteed RF performances.

Negative bias voltages can also be used to control the gain,

the output power and the operating current during operation of the

device.

Matching Circuits Output matching circuit is required to achieve

the output power and gain guaranteed. Celeritek’s recommenda-

tion for the topology of the matching circuit is shown in the

schematic diagram of the test circuit in this data sheet.

In providing both the negative and positive bias voltages, it is

important to provide adequate de-coupling between the RF signal

and the DC voltages. Inadequate de-coupling could result in low

output power, low gain or oscillation. Celeritek recommends the

bias circuits shown in the evaluation circuit .

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