2

MITSUBISHI

〈DIGITAL ASSP〉

M66305AP/AFP

TOGGLE LINE BUFFER

eration is switched to read mode, and the line buffer which

has completed output is switched to write mode, enabling

next write and read operations.

To rewrite data during write operation, use write counter re-

set input (CNTRST1). To repeat output during output opera-

tion, use read counter reset (CNTRST2).

These operations are possible only when the status of chip

select (CS) is “L”.

FUNCTION

When the status of input clock enable (ICE) is “L”, input data

(SIDATA) is taken in (written) synchronously with input clock

(SICLK) rise edge. When output clock enable (OCE) is “L”,

output data (SODATA) is output (read) synchronously with

output clock (SOCLK) fall edge. The double buffer system

makes independent read and write operation possible.

When one-line write and one-line read are completed, toggle

signal (T) is required to be changed to “L”, With input of toggle

signal, the line buffer memory which has completed write op-

FUNCTION TABLE

RES

L

H

H

H

H

H

H

H

H

H

H

H

ICE

X

X

H

L

H

L

L

H

L

H

X

X

CS

X

H

L

L

L

L

L

L

L

L

L

L

SIC

X

X

X

X

L

X

L

X

X

X

OCE

X

X

H

H

L

L

X

X

X

X

L

H

SOC

X

X

X

X

L

L

X

X

L

X

T

X

X

H

H

H

H

H

H

H

H

CR1

X

X

H

H

H

H

H

H

H

H

CR2

X

X

H

H

H

H

H

H

H

H

SOD

L

*2

*2

*4

*5

*6

INT

H

*3

*3

H

*5

H

BF

H

*1

*1

H

H

*6

Remarks

Initialization

No internal change, no output change

No internal change, no output change

With rise of SICLK, data is written on line buffer memory.

With fall of SOCLK, data is output.

Write and read

With rise of T:

1) Line buffer memory in read mode is switched to write

mode and the other in write mode is switched to read

mode.

2) BF and INT are canceled.

With CNTRST1 input, internal write counter is reset,

enabling rewriting.

With CNTRST2 input, internal read counter is reset,

enabling retrial of output.

Output

Input

x

: “H” or “L”

*1 : BF changes from “H” to “L” with rise of SICLK for write of 5120th bit.

*2 : With fall of SOCLK, data written before toggle signal input is output in order.

*3 : INT changes from “H” to “L” when the status of SOCLK rises after output of final bit of written before toggle signal inputs.

*5 : Output operation can be performed irrespective of CNTRST1.