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M21L216128A
Elite Semiconduture Memory Technology Inc
Publication Date : Sep. 2000
Revision : 1.0
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Block Diagram
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512 X 4096
MEMORY ARRAY
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Pin Descriptions
Pin No.
Symbol
Description
1 - 5, 18 - 22,
24-27, 42 - 44
A0 - A16
Address Inputs
6
CE
Chip Enable Input
7 - 10, 13 - 16,
29 - 32, 35 - 38
DQ1 - DQ16
Data Inputs/Outputs
17
WE
Write Enable Input
39
LB
Lower Byte Enable Input (DQ1 to DQ8)
40
HB
Higher Byte Enable Input (DQ9 to
DQ16)
41
OE
Output Enable Input
11, 33
VCC
Power
12, 34
GND
Ground
23, 28
NC
No Connection