HANBit

HDD64M72D18RPW

URL : www.hbe.co.kr

7

HANBit Electronics Co.,Ltd.

REV 1.0 (August.2002)

Operating current

(burst read)

BL = 2, reads, continuous burst

One bank open, Address and control inputs

2055

2415

2415

mA

Operating current

(Bust write)

BL = 2, write, continuous burst

One bank open, Address and control inputs

changing

once per clock cycle

2415

2955

2955

mA

Auto refresh current

tRC = tRFC(min) - 8*tCK for DDR200 at 100Mhz,

10*tCK for DDR266A & DDR266B at 133Mhz,

distributed refresh

2055

2415

2415

mA

Normal

354

354

354

Self

refresh

current

Low Power

CKE =< 0.2V, External clock should be on

tCK = 100Mhz for DDR200, 133Mhz for DDR266A

& DDR266B

327

327

327

mA

Operating current

(Four bank operation)

Four bank interleaving with BL=4

-Refer to the following page for detailed test

condition

3315

3945

3945

mA

Notes: Operation at above absolute maximum rating can adversely affect device reliability

AC OPERATING CONDITIONS

PARAMETER

STMBOL

MIN

MAX

UNIT

NOTE

Input High (Logic 1) Voltage, DQ, DQS and DM signals

VREF + 0.31

3

Input Low (Logic 0) Voltage, DQ, DQS and DM signals.

VREF - 0.31

V

3

Input Differential Voltage, CK and CK inputs

0.7

VDDQ+0.6

V

1

Input Crossing Point Voltage, CK and CK inputs

0.5*VDDQ-0.2

0.5*VDDQ+0.2

V

2

Notes:

1.

VID is the magnitude of the difference between the input level on CK and the input on CK.

of the same

pad in

simula-tion. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited

20MHz.

AC OPERATING TEST CONDITIONS

PARAMETER

VALUE

UNIT

NOTE

Input reference voltage for Clock

V

Input signal maximum peak swing

1.5

V

Input signal minimum slew rate

1.0

V

V

Input timing measurement reference level

V

Output timing measurement reference level

V

Output load condition

See Load Circuit

V