HANBit

HSD4M64D4B

URL:www.hbe.co.kr

-

HANBit Electronics Co.,Ltd

REV.1.0 (August.2002)

CLK low pulse width

3

3

3

ns

3

Input setup time

2

2

2

ns

3

Input hold time

1

1

1

ns

3

CLK to output in Low-Z

1

1

1

ns

3

CAS

latency=3

6

6

6

ns

2

CLK to output

in Hi-Z

CAS

latency=2

6

6

7

ns

Notes :

1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.

3. Assumed input rise and fall time (tr & tf) = 1ns.

If tr & tf is longer than 1ns, transient time compensation should be considered, ie., [(tr + tf)/2-1]ns should be added to

the parameter.

SIMPLIFIED TRUTH TABLE

COMMAND

CKE

n-1

CKE

N

/C

S

/R

A

S

/C

A

S

/W

E

D

Q

M

BA

0,1

A10/

AP

A11

A9~A0

NOTE

Register

Mode register set

H

X

L

L

L

L

X

OP code

1,2

Auto refresh

H

3

Entry

H

L

L

L

L

H

X

X

3

L

H

H

H

3

Refresh

Self

refresh

Exit

L

H

H

X

X

X

X

X

3

Bank active & row addr.

H

X

L

L

H

H

X

V

Row address

Auto

precharge

disable

L

4

Read &

column

address

Auto

precharge

disable

H

X

L

H

L

H

X

V

H

Column

Address

(A0 ~ A7)

4,5

Auto

precharge

disable

L

Column

Address

(A0 ~ A7)

4

Write &

column

address

Auto

precharge

disable

H

X

L

H

L

L

X

V

H

4,5

Burst Stop

H

X

L

L

H

L

X

X

6

Bank selection

V

L

Precharge

All banks

H

X

L

L

H

L

X

X

H

X

H

X

X

X

Entry

H

L

L

V

V

V

X

Clock suspend or

active power down

Exit

L

H

X

X

X

X

X

X

H

X

X

X

Entry

H

L

L

H

H

H

X

H

X

X

X

Precharge

power

down mode

Exit

L

H

L

V

V

V

X

X

DQM

H

X

V

X

7

H

X

X

X

No operation command

H

X

L

H

H

H

X

X

(V=Valid, X=Don't care, H=Logic high, L=Logic low)