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ADC12DL080CIVS Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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ADC12DL080CIVS Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 24 page  Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Description ANALOG I/O 15 2 V INA+ V INB+ Differential analog input pins. With a 1.0V reference voltage the differential full-scale input signal level is 2.0 V P-P with each input pin voltage centered on a common mode voltage, V CM. The negative input pins may be connected to V CM for single-ended operation, but a differential input signal is required for best performance. 16 1 V INA− V INB− 7V REF This pin is used in conjunction with REFSEL/DCS (pin 11) to select the internal 1.0V reference, or as the external reference input. If V REF is tied HIGH, the internal 1.0V reference is selected. REFSEL/DCS must be LOW or tied to V RMAorVRMB. If a voltage in the range of 0.8V to 1.2V is applied to this pin, that voltage is used as the reference. V REF should be bypassed to AGND with a 0.1 µF low ESL capacitor when an external reference is used. The nominal external reference voltage is 1.0V but values in the range of 0.8V to 1.2V may be used. REFSEL/DCS must be HIGH or tied to V RMAorVRMB. See Table 3 in Section 2.2 for more information. 11 REFSEL/DCS This pin is used in conjunction with V REF (pin 7) to select the reference source and turn the Duty Cycle Stabilizer (DCS) on or off. When REFSEL/DCS is LOW and V REF is HIGH, the internal 1.0V reference is selected and DCS is On. When REFSEL/DCS is HIGH, an external reference voltage in the range of 0.8V to 1.2V should be applied to the V REF input. DCS is On. With this pin connected to V RMAorVRMB, DCS is Off. See Table 3 in Section 2.2 for more information. 13 5 V RPA V RPB These are reference bypass pins. These pins should each be bypassed to ground with a 0.1 µF capacitor. A 10 µF capacitor should be placed between the V RPA and VRNA pins and between the V RPB and VRNB pins. These pins should not be loaded. 14 4 V RMA V RMB 12 6 V RNA V RNB DIGITAL I/O 60 CLK Digital clock input. The range of frequencies for this input is as specified in the electrical tables with guaranteed performance at 80 MHz. The inputs are sampled on the rising edge. www.national.com 3 |
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