GS8170DW36/72AC-350/333/300/250

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.04 4/2005

21/32

© 2003, GSI Technology

Timing Parameter Key—Double Late Write Mode Control and Data In Timing

JTAG Port Operation

Overview

The JTAG Port on this RAM operates in a manner that is compliant with IEEE Standard 1149.1-1990, a serial boundary scan

Disabling the JTAG Port

It is possible to use this device without utilizing the JTAG port. The port is reset at power-up and will remain inactive unless

clocked. TCK, TDI, and TMS are designed with internal pull-up circuits.To assure normal operation of the RAM with the JTAG

tKHnX

tnVKH

tAVKH

tKHAX

CK

A

AB

C

E1, E2, E3,

W, Bx, ADV

tKHDX

tDVKH

DA

DQ (Data In)

Note: tnVKH = tEVKH, tWVKH, tBVKH, etc. and tKHnX = tKHEX, tKHWX, tKHBX, etc.