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GS76024AB-10I Datasheet(PDF) 7 Page - GSI Technology |
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GS76024AB-10I Datasheet(HTML) 7 Page - GSI Technology |
7 / 12 page tAA tRC Address tAC tLZ tOE tOLZ CE OE Data Out tHZ tOHZ Data valid High impedance GS76024AB Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.02 12/2005 7/12 © 2003, GSI Technology Read Cycle 2: WE = VIH Write Cycle Parameter Symbol -8 -10 -12 Unit Min Max Min Max Min Max Write cycle time tWC 8 — 10 — 12 — ns Address valid to end of write tAW 5.5 — 7 — 8 — ns Chip enable to end of write tCW 5.5 — 7 — 8 — ns Byte enable to end of write tBW 5.5 — 7 — 8 — ns Data set up time tDW 4 — 4.5 — 6 — ns Data hold time tDH 0 — 0 — 0 — ns Write pulse width tWP 5.5 — 7 — 8 — ns Address set up time tAS 0 — 0 — 0 — ns Write recovery time (WE) tWR 0 — 0 — 0 — ns Write recovery time (CE) tWR1 0 — 0 — 0 — ns Output Low Z from end of write tWLZ* 3 — 3 — 3 — ns Write to output in High Z tWHZ* — 3.5 — 4 — 5 ns * These parameters are sampled and are not 100% tested. |
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