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74ABT648PWDH Datasheet(PDF) 7 Page - NXP Semiconductors |
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74ABT648PWDH Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 14 page Philips Semiconductors Product specification 74ABT648 Octal bus transceiver/register, inverting (3-State) 1998 Jun 08 7 AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Max Min Max fMAX Maximum clock frequency 1 125 200 125 MHz tPLH tPHL Propagation delay CPAB to Bn or CPBA to An 1 2.2 1.7 5.3 5.9 6.8 7.4 2.2 1.7 7.8 8.4 ns tPLH tPHL Propagation delay An to Bn or Bn to An 2 3 1.0 1.5 3.6 4.2 5.1 5.6 1.0 1.5 6.1 6.3 ns tPLH tPHL Propagation delay SAB to Bn or SBA to An 2 3 1.5 1.5 4.9 5.4 6.1 6.9 1.5 1.5 7.1 7.7 ns tPZH tPZL Output enable time OE to An or Bn 5 6 1.0 2.1 4.3 5.5 5.3 7.4 1.0 2.1 6.3 8.8 ns tPHZ tPLZ Output disable time OE to An or Bn 5 6 1.5 1.5 6.2 6.0 7.3 7.0 1.5 1.5 8.3 7.5 ns tPZH tPZL Output enable time DIR to An or Bn 5 6 1.2 2.5 4.8 6.0 5.7 9.0 1.2 2.5 6.7 9.5 ns tPHZ tPLZ Output disable time DIR to An or Bn 5 6 1.5 1.5 5.9 6.3 6.7 7.2 1.5 1.5 7.7 8.2 ns AC SETUP REQUIREMENTS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω LIMITS SYMBOL PARAMETER WAVEFORM Tamb = +25oC VCC = +5.0V Tamb = -40 to +85oC VCC = +5.0V ±0.5V UNIT Min Typ Min ts(H) ts(L) Setup time An to CPAB, Bn to CPBA 4 3.0 3.0 1.5 1.0 3.0 3.0 ns th(H) th(L) Hold time An to CPAB, Bn to CPBA 4 0.0 0.0 –0.4 –1.0 0.0 0.0 ns tw(H) tw(L) Pulse width, High or Low CPAB or CPBA 1 3.5 4.0 2.6 1.0 3.5 4.0 ns |
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