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AD7453 Datasheet(PDF) 1 Page - Analog Devices |
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AD7453 Datasheet(HTML) 1 Page - Analog Devices |
1 / 20 page REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. AD7453 Pseudo Differential, 555 kSPS, 12-Bit ADC in an 8-Lead SOT-23 FEATURES Specified for VDD of 2.7 V to 5.25 V Low Power at Max Throughput Rate: 3.3 mW Max at 555 kSPS with VDD = 3 V 7.25 mW Max at 555 kSPS with VDD = 5 V Pseudo Differential Analog Input Wide Input Bandwidth: 70 dB SINAD at 100 kHz Input Frequency Flexible Power/Serial Clock Speed Management No Pipeline Delays High Speed Serial Interface—SPI®/QSPI™/ MICROWIRE™/DSP Compatible Power-Down Mode: 1 A Max 8-Lead SOT-23 Package APPLICATIONS Transducer Interface Battery-Powered Systems Data Acquisition Systems Portable Instrumentation Motor Control Communications FUNCTIONAL BLOCK DIAGRAM VREF T/H CONTROL LOGIC 12-BIT SUCCESSIVE APPROXIMATION ADC GND SCLK SDATA CS VDD AD7453 VIN+ VIN– GENERAL DESCRIPTION The AD7453 is a 12-bit, high speed, low power, successive approximation (SAR) analog-to-digital converter that features a pseudo differential analog input. This part operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 555 kSPS. The part contains a low noise, wide bandwidth, differential track-and-hold amplifier (T/H) that can handle input frequen- cies in excess of 1 MHz. The reference voltage for the AD7453 is applied externally to the VREF pin and can range from 100 mV to 3.5 V, depending on the power supply and what suits the application. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the device to interface with microprocessors or DSPs. The input signals are sampled on the falling edge of CS; the conversion is also initiated at this point. The SAR architecture of this part ensures that there are no pipeline delays. The AD7453 uses advanced design techniques to achieve very low power dissipation. PRODUCT HIGHLIGHTS 1. Operation with 2.7 V to 5.25 V Power Supplies. 2. High Throughput with Low Power Consumption. With a 3 V supply, the AD7453 offers 3.3 mW max power consumption for a 555 kSPS throughput rate. 3. Pseudo Differential Analog Input. 4. Flexible Power/Serial Clock Speed Management. The conversion rate is determined by the serial clock, allow- ing the power to be reduced as the conversion time is reduced through the serial clock speed increase. This part also features a shutdown mode to maximize power efficiency at lower throughput rates. 5. Variable Voltage Reference Input. 6. No Pipeline Delay. 7. Accurate control of the sampling instant via a CS input and once-off conversion control. 8. ENOB > 10-bits Typically with 500 mV Reference. |
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