Philips Semiconductors

Product specification

74ALS240A/

74ALS240A-1

Octal inverter buffer (3-State)

2

1991 Feb 08

853–1244 01670

FEATURES

DESCRIPTION

The 74ALS240A is an octal buffer that is ideal for driving bus lines or

buffer memory address registers. The outputs are all capable of

sinking 24mA and sourcing up to 15mA, producing very good

capacitive drive characteristics. The device features two output

enables, OEa and OEb, each controlling four of the 3-State outputs.

5.0V

±0.25V.

TYPE

TYPICAL

PROPAGATION

DELAY

TYPICAL

SUPPLY CURRENT

(TOTAL)

74ALS240A

4.5ns

15mA

74ALS240A-1

4.5ns

15mA

PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

SF00320

OEa

Ia0

Yb0

Ia1

Yb1

Ia2

Yb2

Ia3

Yb3

GND

OEb

Ya0

Ib0

Ya1

Ib1

Ya2

Ib2

Ya3

Ib3

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

COMMERCIAL RANGE

DRAWING

NUMBER

20-pin plastic DIP

74ALS240AN,

74ALS240A-1N

SOT146-1

20-pin plastic SOL

74ALS240AD,

74ALS240A-1D

SOT163-1

20-pin plastic SSOP

Type II

74ALS240ADB,

74ALS240A-1DB

SOT339-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74ALS (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

Ian, Ibn

Data inputs

1.0/1.0

20

µA/0.1mA

OEa, OEb

Output Enable inputs (active-Low)

1.0/1.0

20

µA/0.1mA

Yan, Ybn

Data outputs

750/240

15mA/24mA

Yan, Ybn

Data outputs (-1 version)

750/480

15mA/48mA

NOTE:

One (1.0) ALS unit load is defined as: 20

µA in the High state and 0.1mA in the Low state.

LOGIC SYMBOL

GND = Pin 10

SF00321

1

19

OEa

OEb

2

4

6

8

17

15

13

11

18

16

14

12

3579

Ia0

Ia1

Ia2

Ia3

Ib0

Ib1

Ib2 Ib3

Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3

IEC/IEEE SYMBOL

2D

1

2

SF00322

1

19

EN1

EN2

4

2

6

8

17

15

13

11

18

16

14

12

3

5

7

9