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SN65LVCP23 Datasheet(PDF) 2 Page - Texas Instruments |
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SN65LVCP23 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 17 page SN65LVCP23 SLLS554C − NOVEMBER 2002 − REVISED SEPTEMBER 2004 www.ti.com 2 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PACKAGE DESIGNATOR PART NUMBER(1) SYMBOLIZATION SOIC SN65LVCP23D LVCP23 TSSOP SN65LVCP23PW LVCP23 (1) Add the suffix R for taped and reeled carrier PACKAGE DISSIPATION RATINGS PACKAGE CIRCUIT BOARD MODEL TA ≤ 25°C POWER RATING DERATING FACTOR(1) ABOVE TA = 25°C TA = 85°C POWER RATING SOIC (D) High-K(2) 1361 mW 13.9 mW/ °C 544 mW TSSOP (PW) High-K(2) 1074 mW 10.7 mW/ °C 430 mW (1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. (2) In accordance with the High-K thermal metric definitions of EIA/JESD51-7. THERMAL CHARACTERISTICS PARAMETER TEST CONDITIONS VALUE UNITS θJB Junction-to-board thermal resistance D 15.7 °C/W θJB Junction-to-board thermal resistance PW 22.1 °C/W θJC Junction-to-case thermal resistance D 26.1 °C/W θJC Junction-to-case thermal resistance PW 17.3 °C/W PD Device power dissipation Typical VCC = 3.3−V, TA = 25°C, 2 Gbps 165 mW PD Device power dissipation Maximum VCC = 3.6−V, TA = 85°C, 2 Gbps 234 mW FUNCTION TABLE SEL0 SEL1 OUT0 OUT1 FUNCTION 0 0 IN0 IN0 1:2 Splitter 0 1 IN0 IN1 Repeater 1 0 IN1 IN0 Switch 1 1 IN1 IN1 1:2 Splitter FUNCTIONAL BLOCK DIAGRAM 01 01 OUT 0 OUT 1 EN 0 EN 1 SEL 1 SEL 0 IN 0 IN 1 |
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