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ACH16652DGG Datasheet(PDF) 11 Page - NXP Semiconductors |
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ACH16652DGG Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 1999 Nov 23 11 Philips Semiconductors Product specification 16-bit transceiver/register with dual enable; 3-state 74ALVCH16652 AC CHARACTERISTICS FOR VCC = 2.7 V AND VCC = 3.0 TO 3.6 V Ground = 0 V; tr =tf ≤ 2.5 ns; CL =50pF. Notes 1. All typical values are measured at Tamb =25 °C. 2. Typical values at VCC = 3.3 V. SYMBOL PARAMETER TEST CONDITIONS Tamb = −40 TO +85 °C UNIT WAVEFORMS VCC (V) MIN. TYP.(1) MAX. tPHL/tPLH propagation delay nAn,nBn to nBn,nAn see Figs 6 and 10 2.7 − 2.8 4.5 ns 3.0 to 3.6 1.0 2.6(2) 3.9 propagation delay nCPAB, nCPBA to nBn,nAn see Figs 8 and 10 2.7 − 3.1 5.2 ns 3.0 to 3.6 1.4 2.9(2) 4.5 propagation delay nSAB,nSBA to nBn,nAn see Figs 7 and 10 2.7 − 3.5 6.4 ns 3.0 to 3.6 1.3 3.1(2) 5.3 tPZH/tPZL 3-state output enable time nOEAB to nBn see Figs 9 and 10 2.7 − 2.4 4.6 ns 3.0 to 3.6 1.0 2.2(2) 4.0 tPHZ/tPLZ 3-state output disable time nOEAB to nBn see Figs 9 and 10 2.7 − 3.4 5.1 ns 3.0 to 3.6 1.4 2.7(2) 4.5 tPZH/tPZL 3-state output enable time nOEBA to nAn see Figs 9 and 10 2.7 − 3.0 4.6 ns 3.0 to 3.6 1.0 2.2(2) 4.0 tPHZ/tPLZ 3-state output disable time nOEBA to nAn see Figs 9 and 10 2.7 − 3.1 5.1 ns 3.0 to 3.6 1.1 2.9(2) 4.5 tW clock pulse width HIGH or LOW nCPAB or nCPBA see Figs 8 and 10 2.7 3.3 1.0 − ns 3.0 to 3.6 3.3 0.7(2) − tsu set-up time nAn,nBn to nCPAB, nCPBA see Figs 8 and 10 2.7 1.7 0.2 − ns 3.0 to 3.6 1.4 0.3(2) − th hold time nAn,nBn to nCPAB, nCPBA see Figs 8 and 10 2.7 0.4 0.1 − ns 3.0 to 3.6 0.7 0.2(2) − fmax maximum clock pulse frequency see Figs 8 and 10 2.7 150 320 − MHz 3.0 to 3.6 150 320(2) − |
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