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IS32WV204816B-70BI Datasheet(PDF) 3 Page - Integrated Silicon Solution, Inc |
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IS32WV204816B-70BI Datasheet(HTML) 3 Page - Integrated Silicon Solution, Inc |
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3 / 18 page  IS32WV204816B ISSI® Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 3 Rev. B 04/29/04 TRUTH TABLE Function CS1 CS2 OE WE LB UB ADD I /O0 to I/O7 I/O8 to I/O15 Power Read: Word L H L H L L X X I/OOUT I/OOUT ICC1 Read: Lower Byte L H L H L H X X I/OOUT HIGH-Z ICC1 Read: Upper Byte L H L H H L X X HIGH-Z I/OOUT ICC1 Write: Word L H X L L L X X DIN DIN ICC1 Write: Lower L H X L L H X X DIN INVALID ICC1 Write: Upper L H X L H L X X INVALID DIN ICC1 Outputs Disabled L HHHX X X X HIGH-Z HIGH-Z ISB Standby H H XXX X X HIGH-Z HIGH-Z ISB Deep Power-Down Standby H L X X X X X HIGH-Z HIGH-Z ISB3 L = VIL, H =VIH, X = VIL or VIH, High-Z = High-impedance. XX = At CS1 falling edge, all addresses (A2 to A20) are valid "IN". Page address signals (A0 and A1) must be VIH or VIL, during entire cycle. |
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