IS64LV6416L

5

Rev. C

05/02/03

1

2

3

4

5

6

7

8

9

10

11

12

-10 ns

-12 ns

Symbol

Parameter

Min. Max.

Min. Max.

Unit

Read Cycle Time

10

—

12

—

ns

Address Access Time

—

10

—

12

ns

Output Hold Time

3

—

3

—

ns

CE Access Time

—

10

—

12

ns

OE Access Time

—

5

—

6

ns

OE to High-Z Output

—

5

—

6

ns

OE to Low-Z Output

0

—

0

—

ns

CE to High-Z Output

0

5

0

6

ns

CE to Low-Z Output

3

—

3

—

ns

LB, UB Access Time

—

6

—

6

ns

LB, UB to High-Z Output

0

5

0

6

ns

LB, UB to Low-Z Output

0

—

0

—

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and

output loading specified in Figure 1a.

2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

3 ns

Input and Output Timing

1.5V

and Reference Level

Output Load

See Figures 1a and 1b

AC TEST LOADS

Figure 1a.

Figure 1b.

319

Ω

30 pF

Including

jig and

scope

353

Ω

OUTPUT

3.3V

319

Ω

5 pF

Including

jig and

scope

353

Ω

OUTPUT

3.3V