9

Rev. A

07/23/03

IS93C46B

AC WAVEFORMS

FIGURE 2.

SYNCHRONOUS DATA TIMING

FIGURE 3.

READ CYCLE TIMING

CS

0

Dm

D0

11

0

An

A0

*

Notes:

To determine address bits An-A0 and data bits Dm-Do, see Instruction Set.

T

CS

SK

(READ)

(WRITE)

(WRALL)

(ERASE)

(ERAL)

STATUS VALID