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THC63LVD103 Datasheet(PDF) 8 Page - THine Electronics, Inc. |
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THC63LVD103 Datasheet(HTML) 8 Page - THine Electronics, Inc. |
8 / 12 page Copyright 2001-2006 THine Electronics, Inc. All rights reserved. 8 THine Electronics, Inc. THC63LVD103 _Rev2.2 Switching Characteristics VCC = 3.0V ~ 3.6V, Ta = 0 ~ +70 AC Timing Diagrams Symbol Parameter Min. Typ. Max. Units tTCIT CLK IN Transition time 5.0 ns tTCP CLK IN Period 7.4 125.0 ns tTCH CLK IN High Time 0.35tTCP 0.5tTCP 0.65tTCP ns tTCL CLK IN Low Time 0.35tTCP 0.5tTCP 0.65tTCP ns tTCD CLK IN to TCLK+/- Delay 3tTCP ns tTS TTL Data Setup to CLK IN 2.5 ns tTH TTL Data Hold from CKL IN 0 ns tLVT LVDS Transition Time 0.6 1.5 ns tTOP1 Output Data Position0 -0.2 0.0 +0.2 ns tTOP0 Output Data Position1 ns tTOP6 Output Data Position2 ns tTOP5 Output Data Position3 ns tTOP4 Output Data Position4 ns tTOP3 Output Data Position5 ns tTOP2 Output Data Position6 ns tTPLL Phase Lock Loop Set 10.0 ms °C °C t TCP 7 -----------0.2 – t TCP 7 ----------- t TCP 7 -----------0.2 + 2 t TCP 7 -----------0.2 –2 t TCP 7 -----------2 t TCP 7 -----------0.2 + 3 t TCP 7 -----------0.2 –3 t TCP 7 -----------3 t TCP 7 -----------0.2 + 4 t TCP 7 -----------0.2 –4 t TCP 7 -----------4 t TCP 7 -----------0.2 + 5 t TCP 7 -----------0.2 –5 t TCP 7 -----------5 t TCP 7 -----------0.2 + 6 t TCP 7 -----------0.2 –6 t TCP 7 -----------6 t TCP 7 -----------0.2 + TTL Input 5pF 20% 80% 20% 80% tLVT tLVT CLK IN LVDS Output 90% 10% 90% 10% tTCIT tTCIT Vdiff 100 Ω Vdiff=(TA+)-(TA-) TA+ TA- LVDS Output Load |
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