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EM6617 Datasheet(PDF) 2 Page - EM Microelectronic - MARIN SA |
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EM6617 Datasheet(HTML) 2 Page - EM Microelectronic - MARIN SA |
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2 / 65 page  EM6617 Copyright © 2005, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com EM6617 at a glance • Power Supply - Low voltage low power architecture including internal voltage regulator - 2.0 ... 5.5 V battery voltage for all logic functions - 2.6 ... 5.5 V battery voltage for the ADC (0.2LSB) - 3.2 µA in active mode, ADC off - 9.0 µA active mode, ADC on - 0.6µA in standby mode - 0.1µA in sleep mode - 32 KHz crystal oscillator • RAM - 64 x 4 bit, direct addressable - 64 x 4 bit, indirect addressable • ROM - 3072 x 16 bit metal mask programmable • E 2PROM - 64 x 8 bit, indirect addressable - Interrupt request at the end of a write operation • CPU - 4 bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions • Main Operating Modes and Resets - Active Mode (CPU is running) - Standby Mode (CPU in halt) - Sleep Mode (No clock, reset state) - Initial reset on power on (POR) - Watchdog resets (logic and oscillation watchdogs) - Reset terminal - Reset with input combination on port A register selectable, ¨AND¨ or ¨OR¨ type by metal mask • 4-Bit Input Port A - Direct input read on the port terminals - Debouncer function available on all inputs - Interrupt request on positive or negative edge - Pull-up or pull-down or none selectable by register - Test variables (software) for conditional jumps - PA[0] and PA[3] are inputs for the event counter - Reset with input combination (register selectable) • Serial Write Buffer (output) - Max 256 bits long bit rates of 16kHz,8kHz,2kHz,1kHz - Automatic or interactive send mode - Interrupt request when buffer is empty • 2 Channel 8-bit ADC - Conversion time is 305 µs @32kHz - 2 operating modes (continuous, single) - Interrupt request at the end of conversion • Prescaler - 15 stage system clock divider down to 1 Hz - 2 Interrupt requests; 1 Hz, 32 Hz or 8 Hz - Prescaler reset (4 KHz to 1Hz) • 4-Bit Bi-directional Port B - All different functions bit-wise selectable - Direct input read on the port terminals - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode - Selectable PWM, 1kHz, 32kHz and 2kHz output • 4Bit Bi-directional Port C - Input or output mode as whole port - Direct input read on port terminal - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode • Voltage Level Detector - 3 levels software selectable (2.0, 2.5, 3.0 V) - Busy flag during measure - Interrupt request at end of measure • 10-Bit Universal Counter - 10, 8, 6 or 4bit up/down counting - Parallel load - 8 different input clocks - Event counting (PA[0] or PA[3] ) - Full 10 bit or limited (8, 6, 4 bit) compare function - 2 interrupt requests (on compare and on 0) - Hi-frequency input on PA[3] and PA[0] - Pulse-width modulation (PWM) output • Interrupt Controller - 4 external and 8 internal interrupt request sources - Each interrupt can individually be maskable - Each interrupt can individually be reset - Automatic reset of each interrupt request after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode |
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