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W3E16M64S-250BC Datasheet(PDF) 6 Page - White Electronic Designs Corporation |
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W3E16M64S-250BC Datasheet(HTML) 6 Page - White Electronic Designs Corporation |
6 / 16 page 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs W3E16M64S-XBX February 2005 Rev. 4 EXTENDED MODE REGISTER The extended mode register controls functions beyond those controlled by the mode register; these additional functions are DLL enable/disable, output drive strength, and QFC#. These functions are controlled via the bits shown in Figure 5. The extended mode register is programmed via the LOAD MODE REGISTER command to the mode register (with BA0 = 1 and BA1 = 0) and will retain the stored information until it is programmed again or the device loses power. The enabling of the DLL should always be followed by a LOAD MODE REGISTER command to the mode register (BA0/BA1 both LOW) to reset the DLL. The extended mode register must be loaded when all banks are idle and no bursts are in progress, and the controller must wait the specified time before initiating any subsequent operation. Violating either of these requirements could result in unspecified operation. TABLE 1 – BURST DEFINITION FIGURE 3 – MODE REGISTER DEFINITION M3 = 0 2 4 8 Reserved Reserved Reserved M3 = 1 2 4 8 Reserved Reserved Reserved Reserved Operating Mode Normal Operation Normal Operation/Reset DLL All other states reserved 00 Valid Valid 0 1 Burst Type Sequential Interleaved CAS Latency Reserved Reserved 2 Reserved Reserved 2.5 Reserved Burst Length M0 0 1 0 1 0 1 0 1 Burst Length CAS Latency BT A9 A7 A6 A5 A4 A3 A8 A2 A1 A0 Mode Register (Mx) Address Bus M1 0 0 1 1 0 0 1 1 M2 0 0 0 0 1 1 1 1 M3 M4 0 1 0 1 0 1 0 1 M5 0 0 1 1 0 0 1 1 M6 0 0 0 0 1 1 1 1 M6-M0 M8 M7 Operating Mode A10 A11 * M14 and M13 (BA0 and BA1 must be "0, 0" to select the base mode register (vs. the extended mode register). 0* 0* BA0 BA1 Reserved Reserved Reserved Reserved M9 M10 M11 0 0 0 10 0 0 0 -- - - - - A12 M12 0 0 - Burst Length Starting Column Address Order of Accesses Within a Burst Type = Sequential Type = Interleaved 2 A0 0 0-1 0-1 1 1-0 1-0 4 A1 A0 0 0 0-1-2-3 0-1-2-3 0 1 1-2-3-0 1-0-3-2 1 0 2-3-0-1 2-3-0-1 1 1 3-0-1-2 3-2-1-0 8 A2 A1 A0 0 0 0 0-1-2-3-4-5-6-7 0-1-2-3-4-5-6-7 0 0 1 1-2-3-4-5-6-7-0 1-0-3-2-5-4-7-6 0 1 0 2-3-4-5-6-7-0-1 2-3-0-1-6-7-4-5 0 1 1 3-4-5-6-7-0-1-2 3-2-1-0-7-6-5-4 1 0 0 4-5-6-7-0-1-2-3 4-5-6-7-0-1-2-3 1 0 1 5-6-7-0-1-2-3-4 5-4-7-6-1-0-3-2 1 1 0 6-7-0-1-2-3-4-5 6-7-4-5-2-3-0-1 1 1 1 7-0-1-2-3-4-5-6 7-6-5-4-3-2-1-0 NOTES: 1. For a burst length of two, A1-Ai select two-data-element block; A0 selects the starting column within the block. 2. For a burst length of four, A2-Ai select four-data-element block; A0-1 select the starting column within the block. 3. For a burst length of eight, A3-Ai select eight-data-element block; A0-2 select the starting column within the block. 4. Whenever a boundary of the block is reached within a given sequence above, the following access wraps within the block. |
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