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White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

White Electronic Designs

WED7PxxxATA80xxC25

July 2005

Rev. 1

White Electronic Designs Corp. reserves the right to change products or specifications without notice.

AC CHARACTERISTICS (cont'd):

I/O Input (Read) Timing Specification

Item

Symbol

IEEE Symbol

Min ns.

Max ns.

Data Delay after IORD

td(IORD)

100

Data Hold following IORD

th(IORD)

0

IORD Width Time

tw(IORD)

165

Address Setup before IORD

tsuA(IORD)

70

Address Hold following IORD

thA(IORD)

20

CE Setup before IORD

tsuCE(IORD)

5

CE Hold following IORD

thCE(IORD)

20

REG Setup before IORD

tsuREG(IORD)

5

REG Hold following IORD

thREG(IORD)

0

INPACK Delay Falling from IORD

tdfINPACK(IORD)

045

INPACK Delay Rising from IORD

tdrINPACK(IORD)

45

IOIS16 Delay Falling from Address

tdfIOIS16(ADR)

35

IOIS16 Delay Rising from Address

tdrIOIS16(ADR)

35

Wait Delay Falling from IORD

tdWT(IORD)

35

Data Delay from Wait Rising

td(WT)

0

Wait Width Time

tw(WT)

350 (3000 for CF+)

Note: Maximum load on WAIT#, INPACK# and I0IS16# is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IORD# high is Onsec, but

minimum IORD# width must still be met. Wait Width time meets PCMCIA specification of 12ps but is intentionally less in this spec.

I/O Output (Write) Timing Specification

Item

Symbol

IEEE Symbol

Min ns.

Max ns.

Data Setup before IOWR

tsu(IOWR)

60

Data Hold following IOWR

th(IOWR)

30

IOWR Width Time

tw(IOWR)

165

Address Setup before IOWR

tsuA(IOWR)

70

Address Hold following IOWR

thA(IOWR)

20

CE Setup before IOWR

tsuCE(IOWR)

5

CE Hold following IOWR

thCE(IOWR)

20

REG Setup before IOWR

tsuREG(IOWR)

5

REG Hold following IOWR

thREG(IOWR)

0

IOIS16 Delay Falling from Address

tdfIOIS16(ADR)

35

IOIS16 Delay Rising from Address

tdrIOIS16(ADR)

35

Wait Delay Falling from IOWR

tdWT(IOWR)

35

IOWR high from Wait high

tdrIOWR(WT)

0

Wait Width Time

tw(WT)

350 (3000for CF+)

Note: The maximum load on WAIT#, INPACK#, and I0IS16# is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IOWR# high is Onsec,

but minimum IOWR# width must still be met. The Wait Width time meets the PCMCIA specification of 12ps but is intentionally less in this specification.