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73K321L Datasheet(PDF) 4 Page - TDK Electronics |
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73K321L Datasheet(HTML) 4 Page - TDK Electronics |
4 / 26 page 73K222BL V.22, V.21, Bell 212A, Bell 103 Single-Chip Modem with Integrated Hybrid 4 FUNCTIONAL DESCRIPTION (continued) PARALLEL BUS INTERFACE Four 8-bit registers are provided for control, option select and status monitoring. These registers are addressed with the AD0, AD1, and AD2 multiplexed address lines (latched by ALE) and appear to a control microprocessor as four consecutive memory locations. Two control registers and the tone register are read/write memory. The detect register is read only and cannot be modified except by modem response to monitored parameters. SPECIAL DETECT CIRCUITRY The special detect circuitry monitors the received analog signal to determine status or presence of carrier, call-progress tones, answer tone and weak received signal (long loop condition). An unscrambled mark request signal is also detected when the received data out of the DPSK demodulator before the descrambler has been high for 165.5 ms ± 6.5 ms minimum. The appropriate detect register bit is set when one of these conditions changes and an interrupt is generated for all purposes except long loop. The interrupts are disabled (masked) when the enable interrupt bit is set to 0. DTMF GENERATOR The DTMF generator will output one of 16 standard tone pairs determined by a 4-bit binary value and TX DTMF mode bit previously loaded into the tone register. Tone generation is initiated when the DTMF mode is selected using the tone register and the transmit enable (CR0 bit D1) is changed from 0 to 1. |
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