ADS5525IRGZT datasheet(4/48 Pages) TI

Part #	ADS5525IRGZT

Description	12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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Manufacturer	TI [Texas Instruments]

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ELECTRICAL CHARACTERISTICS

ADS5525

SLWS191 – JULY 2006

Typical values are at 25

°C, min and max values are across the full temperature range T

MIN = –40°C to TMAX = 85°C,

AVDD = DRVDD = 3.3 V, sampling rate = 170 MSPS, sine wave input clock, 1.5 V

PP differential clock amplitude, 50% clock

duty cycle, –1 dBFS differential analog input, internal reference mode, 0dB gain, DDR LVDS data output (unless otherwise

noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RESOLUTION

12

bits

ANALOG INPUT

Differential input voltage range

2

VPP

Differential input capacitance

7

pF

Analog input bandwidth

–3 dB, source impedance 50

Ω

500

MHz

Analog input common mode current

280

µA

(per input pin)

REFERENCE VOLTAGES

V(REFB)

Internal reference bottom voltage

Internal reference mode

0.5

V

V(REFT)

Internal reference top voltage

Internal reference mode

2.5

V

VCM

Common mode output voltage

Internal reference mode

1.5

V

VCM output current capability

Internal reference mode

±4

mA

DC ACCURACY

No Missing Codes

Specified

DNL

Differential non-linearity

–0.9

0.5

TBD

LSB

INL

Integral non-linearity

± 1

LSB

Offset error

5

mV

Offset temperature coefficient

0.002

ppm/

°C

Gain error

±1

%FS

Gain temperature coefficient

0.01

∆%/°C

PSRR

DC Power supply rejection ratio

0.6

mV/V

POWER SUPPLY

I(AVDD)

Analog supply current

284

mA

LVDS mode, IO = 3.5 mA,

49

mA

RL = 100 Ω, CL = 5 pF

I(DRVDD)

Digital supply current

CMOS mode, FIN = 2.5 MHz,

39

mA

CL = 5 pF

ICC

Total supply current

LVDS mode

333

mA

Total power dissipation

LVDS mode

1.1

TBD

W

In STANDBY mode with clock

Standby power

100

TBD

mW

running

Clock stop power

With input clock stopped

100

TBD

mW

4

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ADS5525IRGZT Datasheet(PDF) 4 Page - Texas Instruments

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