ADN2860ACPZ25-RL7 datasheet(11/20 Pages) AD

Part #	ADN2860ACPZ25-RL7

Description	3-Channel Digital Potentiometer with Nonvolatile Memory

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Manufacturer	AD [Analog Devices]

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ADN2860

Rev. A | Page 11 of 20

EEPROM INTERFACE

MEMORY ADDRESS

MEMORY DATA

SA

A

00

0

1

E

0

01

1

P

0 WRITE

(N BYTES + ACKNOWLEDGE)

EEPROM SLAVE ADDRESS

A/A

Figure 19. EEPROM Write

MEMORY DATA

SA

A

00

0

1

E

0

01

1

P

1 READ

(N BYTES + ACKNOWLEDGE)

EEPROM SLAVE ADDRESS

A

Figure 20. EEPROM Current Read

SLAVE ADDRESS

MEMORY ADDRESS

S

0 WRITE

AA

P

W

SLAVE ADDRESS

MEMORY DATA

SR

1 READ

REPEATED START

A

(N BYTES + ACKNOWLEDGE)

A/A

Figure 21. EEPROM Random Read

The 256 bytes of EEPROM memory provided in the ADN2860

are organized into 16 pages of 16 bytes each. The word size of

each memory location is one byte wide.

The I2C slave address of the EEPROM is 10100(A1E)(A0E),

where A1E and A0E are external pin-programmable address

bits. The 2-pin programmable address bits allow a total of four

ADN2860 devices to be controlled by a single I2C master bus,

each having its own EEPROM.

An internal 8-bit address counter for the EEPROM is

automatically incremented following each read or write

operation. For read operations, the address counter is

incremented after each byte is read, and the counter rolls over

from Address 255 to 0.

For write operations, the address counter is incremented after

each byte is written. The counter rolls over from the highest

address of the current page to the lowest address of the current

page. For example, writing two bytes beginning at Address 31

causes the counter to roll back to Address 16 after the first byte

is written; then the address increments to 17 after the second

byte is written.

EEPROM Write

Each write operation issued to the EEPROM programs between

1 byte and 16 bytes (one page) of memory. Figure 19 shows the

EEPROM write interface. The number of bytes of data, N, that

the user wants to send to the EEPROM is unrestricted. If more

than 16 bytes of data are sent in a single write operation, the

address counter rolls back to the beginning address, and the

previously sent data is overwritten.

EEPROM Write-Acknowledge Polling

After each write operation, an internal EEPROM write cycle

begins. During the EEPROM internal write cycle, the I2C

interface of the device is disabled. It is necessary to determine if

the internal write cycle is complete and whether the I2C

interface is enabled. To do so, execute I2C interface polling by

sending a start condition, followed by the EEPROM slave

address plus the desired R/W bit. If the ADN2860 I

2C interface

responds with an ACK, the write cycle is complete and the

interface is ready to proceed with further operations.

Otherwise, the I2C interface must be polled again to determine

whether the write cycle has been completed.

EEPROM Read

The ADN2860 EEPROM provides two different read

operations, shown in Figure 20 and Figure 21. The number of

bytes, N, read from the EEPROM in a single operation is

unrestricted. If more than 256 bytes are read, the address

counter rolls back to the start address, and data previously read

is read again.

Figure 20 shows the EEPROM current read operation. This

operation does not allow an address location to be specified,

and reads data beginning at the current address location stored

in the internal address counter.

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