RTL8201CP
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
iv
Track ID: JATR-1076-21 Rev. 1.21
7.12.
FAR END FAULT INDICATION ......................................................................................................................................22
8.
CHARACTERISTICS .......................................................................................................................................................23
8.1.
DC CHARACTERISTICS...............................................................................................................................................23
8.1.1.
Absolute Maximum Ratings..................................................................................................................................23
8.1.2.
Operating Conditions ...........................................................................................................................................23
8.1.3.
Power Dissipation ................................................................................................................................................23
8.1.4.
Input Voltage: Vcc ................................................................................................................................................23
8.2.
AC CHARACTERISTICS...............................................................................................................................................24
8.2.1.
MII Transmission Cycle Timing............................................................................................................................24
8.2.2.
MII Reception Cycle Timing .................................................................................................................................25
8.2.3.
SNI Transmission Cycle Timing............................................................................................................................27
8.2.4.
SNI Reception Cycle Timing .................................................................................................................................28
8.2.5.
MDC/MDIO Timing..............................................................................................................................................29
8.3.
CRYSTAL CHARACTERISTICS......................................................................................................................................30
8.4.
TRANSFORMER CHARACTERISTICS ............................................................................................................................30
9.
MECHANICAL DIMENSIONS .......................................................................................................................................31
9.1.
MECHANICAL DIMENSIONS NOTES ............................................................................................................................32
10.
ORDERING INFORMATION......................................................................................................................................33
List of Tables
Table 1. MII Interface..................................................................................................................................4
Table 2. SNI (Serial Network Interface) 10Mbps Only ..............................................................................5
Table 3. Clock Interface ..............................................................................................................................5
Table 4. 10Mbps/100Mbps Network Interface............................................................................................5
Table 5. Device Configuration Interface .....................................................................................................6
Table 6. LED Interface/PHY Address Configuration..................................................................................6
Table 7. Power and Ground Pins .................................................................................................................7
Table 8. Reset and Other Pins......................................................................................................................7
Table 9. Register 0 Basic Mode Control Register .......................................................................................8
Table 10. Register 1 Basic Mode Status Register..........................................................................................9
Table 11. Register 2 PHY Identifier Register 1.............................................................................................9
Table 12. Register 3 PHY Identifier Register 2.............................................................................................9
Table 13. Register 4 Auto-Negotiation Advertisement Register (ANAR)..................................................10
Table 14. Register 5 Auto-Negotiation Link Partner Ability Register (ANLPAR) ....................................10
Table 15. Register 6 Auto-Negotiation Expansion Register (ANER).........................................................11
Table 16. Register 16 NWay Setup Register (NSR)....................................................................................12
Table 17. Register 17 Loopback, Bypass, Receiver Error Mask Register (LBREMR) ..............................12
Table 18. Register 18 RX_ER Counter (REC)............................................................................................13
Table 19. Register 19 SNR Display Register ..............................................................................................13
Table 20. Register 25 Test Register.............................................................................................................13
Table 21. Serial Management ......................................................................................................................15
Table 22. Setting the Medium Type and Interface Mode to MAC..............................................................16
Table 23. UTP Mode and MII Interface ......................................................................................................16
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