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ST72334J Datasheet(HTML) 6 Page - STMicroelectronics

Part No. ST72334J
Description  8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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ST72334J Datasheet(HTML) 6 Page - STMicroelectronics

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ST72334J/N, ST72314J/N, ST72124J
6/125
2 GENERAL DESCRIPTION
2.1 INTRODUCTION
The ST72334J/N, ST72314J/N and ST72124J de-
vices are members of the ST7 microcontroller fam-
ily. They can be grouped as follows:
– ST72334J/N devices are designed for mid-range
applications with Data EEPROM, ADC, SPI and
SCI interface capabilities.
– ST72314J/N devices target the same range of
applications but without Data EEPROM.
– ST72124J devices are for applications that do
not need Data EEPROM and the ADC peripher-
al.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set.
The
ST72C334J/N,
ST72C314J/N
and
ST72C124J
versions
feature
single-voltage
FLASH memory with byte-by-byte In-Situ Pro-
gramming (ISP) capability.
Under software control, all devices can be placed
in WAIT, SLOW, ACTIVE-HALT or HALT mode,
reducing power consumption when the application
is in idle or standby state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
Figure 1. Device Block Diagram
8-BIT CORE
ALU
RESE T
PORT B
TIMER B
PORT C
SPI
PORT E
SCI
PORT F
TIMER A
WATCH DOG
Internal
CLOCK
CONTROL
RAM
(384 or 512 Bytes)
PORT D
8-BIT ADC
PORT A
VSSA
VDDA
Data-EEPROM
(256 Bytes)
AND LVD
PC7:0
VSS
VDD
POWER
SUPPLY
PROGRAM
(8 or 16K Bytes)
MEMORY
OSC1
OSC2
MULTI OSC
+
CLOCK FILTER
VPP/TEST
(8 bits)
PF7,6,4,2:0
(6 bits)
PE7:0
(6 bits for N versions)
(2 bits for J versions)
PD7:0
(8 bits for N versions)
(6 bits for J versions)
PA7:0
(8 bits for N versions)
(5 bits for J versions)
PB7:0
(8 bits for N versions)
(5 bits for J versions)
5


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