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M6MGT160S2BVP Datasheet(PDF) 11 Page - Mitsubishi Electric Semiconductor

Part # M6MGT160S2BVP
Description  16,777,216-BIT (1,048,576 -WORD BY 16-BIT / 2,097,152-WORD BY 8-BIT) CMOS 3.3V-ONLY FLASH MEMORY
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Manufacturer  MITSUBISHI [Mitsubishi Electric Semiconductor]
Direct Link  http://www.mitsubishichips.com
Logo MITSUBISHI - Mitsubishi Electric Semiconductor

M6MGT160S2BVP Datasheet(HTML) 11 Page - Mitsubishi Electric Semiconductor

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Sep. 1999 , Rev.2.0
MITSUBISHI LSIs
16,777,216-BIT (1,048,576 -WORD BY 16-BIT / 2,097,152-WORD BY 8-BIT) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (131,072-WORD BY 16-BIT / 262,144-WORD BY 8-BIT) CMOS SRAM
Stacked-MCP (Multi Chip Package)
M6MGB/T160S2BVP
11
Read-Only Mode
AC ELECTRICAL CHARACTERISTICS (Ta = -20 ~85
°C)
AC ELECTRICAL CHARACTERISTICS (Ta = -20 ~85
°C)
Timing measurements are made under AC waveforms for read operations.
Read timing parameters during command write operations mode are the same as during read-only operations mode.
Typical values at F-Vcc=3.3V, Ta=25
°C
Symbol
Parameter
ta (AD)
Address access time
tAVQV
tCLZ
Chip enable to output in low-Z
tELQX
ta (CE)
Chip enable access time
tELQV
ta (OE)
Output enable access time
tGLQV
tDF(CE)
Chip enable high to output in high Z
tEHQZ
tRC
Read cycle time
tAVAV
tOLZ
tGLQX
Output enable to output in low-Z
tDF(OE)
tGHQZ
Output enable high to output in high Z
tPHZ
F-RP# low to output high-Z
tPLQZ
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
90
0
90
30
25
90
0
25
150
Max
Min
Typ
Limits
Speed Item: -90
F-Vcc=2.7~3.6V
tWHGL
OE# hold from WE# high
tOEH
tBAD
tAVFL/H
F-RP# recovery to F-CE# low
ns
ns
ns
tPS
tPHEL
10
0
150
tELFL/H F-CE# low to BYTE# high or low
tBCD
tOH
Output hold from CE#, OE#, addresses
tOH
Address to BYTE# high or low
5
5
ta(BYTE)
BYTE# access time
tFL/HQV
tBHZ
BYTE# low to output high-Z
tFLQZ
90
25
ns
ns
ns
ns
Write Mode (WE# control)
Symbol
Parameter
Write cycle time
Data hold time
Data set-up time
Address hold time
Address set-up time
tAVAV
tWHDX
tDVWH
tWHAX
tAVWH
tWC
tDH
tDS
tAH
tAS
Write pulse width
Chip enable hold time
Chip enable set-up time
Write pulse width high
F-RP# high recovery to write enable low
Block Lockhold from valid SRD
Duration of auto-program operation
Duration of auto-block erase operation
Block Lock set-up to write enable high
tWLWH
tWHEH
tELWL
tWHWL
tPHWL
tQVPH
tWHRH1
tWHRH2
tPHHWH
tWP
tCH
tCS
tWPH
tPS
tBLS
tBLH
tDAP
tDAE
OE# hold to WE# Low
tGHWL
tGHWL
OE# hold from WE# high
tWHGL
tOEH
Latency between Read and Write FFH or 71H
-
tRE
Byte enable high or low set-up time
tFL/HWH
tBS
tWHFL/H
tBH
Byte enable high or low hold time
Limits
Unit
ns
ns
ns
ns
ns
90
50
50
Max
Min
Typ
0
0
ns
ns
ns
ns
ns
ns
ms
ms
ns
150
4
40
80
600
60
0
30
0
90
0
ns
0
Speed Item: -90
F-Vcc=2.7~3.6V
ns
ns
10
30
50
90
ns
ns
WE# high to F-RY/BY# low
tWHRL
tWHRL
ns
90


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