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P83C575EHAA Datasheet(PDF) 6 Page - NXP Semiconductors |
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P83C575EHAA Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 40 page Philips Semiconductors Product specification 80C575/83C575/ 87C575 80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer 1998 May 01 6 PIN DESCRIPTIONS (Continued) PIN NUMBER MNEMONIC DIP LCC QFP TYPE NAME AND FUNCTION Port 3: (continued) 10 11 5 I P3.0 RxD Serial receive port 11 13 7 O P3.1 TxD Serial transmit port enabled only when transmitting serial data 12 14 8 I P3.2 INT0 External interrupt 0 13 15 9 I P3.3 INT1 External interrupt 1 14 16 10 I P3.4 T0 Timer/counter 0 input CMPR- Common - reference to comparators 1, 2, 3 15 17 11 I P3.5 T1 Timer/counter 1 input CMP1+ Comparator 1 positive input 16 18 12 O P3.6 WR External data memory write strobe CMP2+ Comparator 2 positive input 17 19 13 O P3.7 RD External data memory read strobe CMP3+ Comparator 3 positive input RST 9 10 4 I Reset: A low on this pin asynchronously resets all port pins to a low state except P3.1. The pin must be held low with the oscillator running for 24 oscillator cycles to initialize the internal registers. An internal diffused resistor to VCC permits a power on reset using only an external capacitor to VSS. RST has a Schmitt trigger input stage to provide additional noise immunity with a slow rising input voltage. ALE/PROG 30 33 27 I/O Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the address during an access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking. Note that one ALE pulse is skipped during each access to external data memory. ALE is switched off if the bit 0 in the AUXR register (8EH) is set. This pin is also the program pulse input (PROG) during EPROM programming. PSEN 29 32 26 O Program Store Enable: The read strobe to external program memory. When the device is executing code from the external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. PSEN is not activated during fetches from internal program memory. EA/VPP 31 35 29 I External Access Enable/Programming Supply Voltage: EA must be externally held low to enable the device to fetch code from external program memory locations 0000H to 1FFFH. If EA is held high, the device executes from internal program memory unless the program counter contains an address greater than 1FFFH. This pin also receives the 12.75V programming supply voltage (VPP) during EPROM programming. XTAL1 19 21 15 I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. XTAL2 18 20 14 O Crystal 2: Output from the inverting oscillator amplifier. |
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