Philips Semiconductors

Preliminary specification

83C748/87C748

80C51 8-bit microcontroller family

2K/64 OTP/ROM, low pin count

1999 Apr 15

7

4MHz

8MHz

12MHz

16MHz

FREQ

MAX ACTIVE ICC

5

TYP ACTIVE ICC

5

MAX IDLE ICC

6

TYP IDLE ICC

6

ICC (mA)

2

4

6

8

10

12

14

16

18

20

22

SU00298

Notes 5 and 6 refer to DC Electrical Characteristics.

OSCILLATOR CHARACTERISTICS

X1 and X2 are the input and output, respectively, of an inverting

amplifier which can be configured for use as an on-chip oscillator.

To drive the device from an external clock source, X1 should be

driven while X2 is left unconnected. There are no requirements on

the duty cycle of the external clock signal, because the input to the

internal clock circuitry is through a divide-by-two flip-flop. However,

minimum and maximum high and low times specified in the data

sheet must be observed.

RESET

A reset is accomplished by holding the RST pin high for at least two

machine cycles (24 oscillator periods), while the oscillator is running.

To insure a good power-up reset, the RST pin must be high long

enough to allow the oscillator time to start up (normally a few

milliseconds) plus two machine cycles. At power-up, the voltage on

IDLE MODE

In idle mode, the CPU puts itself to sleep while all of the on-chip

peripherals stay active. The instruction to invoke the idle mode is the

last instruction executed in the normal operating mode before the

idle mode is activated. The CPU contents, the on-chip RAM, and all

of the special function registers remain intact during this mode. The

idle mode can be terminated either by any enabled interrupt (at

which time the process is picked up at the interrupt service routine

and continued), or by a hardware reset which starts the processor in

the same manner as a power-on reset.

POWER-DOWN MODE

In the power-down mode, the oscillator is stopped and the

instruction to invoke power-down is the last instruction executed.

Only the contents of the on-chip RAM are preserved. A hardware

reset is the only way to terminate the power-down mode. the control

bits for the reduced power modes are in the special function register

PCON.

Table 1.

External Pin Status During Idle and

Power-Down Modes

MODE

Port 0

Port 1

Port 2

Idle

Data

Data

Data

Power-down

Data

Data

Data