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S87C552-4A68 Datasheet(PDF) 2 Page - NXP Semiconductors

Part # S87C552-4A68
Description  80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

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Philips Semiconductors
Product specification
87C552
80C51 8-bit microcontroller
8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O
2
1998 May 01
853-1690 19336
DESCRIPTION
The 87C552 Single-Chip 8-Bit Microcontroller is manufactured in an
advanced CMOS process and is a derivative of the 80C51
microcontroller family. The 87C552 has the same instruction set as
the 80C51. Three versions of the derivative exist:
83C552—8k bytes mask programmable ROM
80C552—ROMless version of the 83C552
87C552—8k bytes EPROM
The 87C552 contains a 8k
× 8 a volatile 256 × 8 read/write data
memory, five 8-bit I/O ports, one 8-bit input port, two 16-bit
timer/event counters (identical to the timers of the 80C51), an
additional 16-bit timer coupled to capture and compare latches, a
15-source, two-priority-level, nested interrupt structure, an 8-input
ADC, a dual DAC pulse width modulated interface, two serial
interfaces (UART and I2C-bus), a “watchdog” timer and on-chip
oscillator and timing circuits. For systems that require extra
capability, the 87C552 can be expanded using standard TTL
compatible memories and logic.
In addition, the 87C552 has two software selectable modes of power
reduction—idle mode and power-down mode. The idle mode freezes
the CPU while allowing the RAM, timers, serial ports, and interrupt
system to continue functioning. The power-down mode saves the
RAM contents but freezes the oscillator, causing all other chip
functions to be inoperative.
The device also functions as an arithmetic processor having
facilities for both binary and BCD arithmetic plus bit-handling
capabilities. The instruction set consists of over 100 instructions: 49
one-byte, 45 two-byte, and 17 three-byte. With a 16MHz crystal,
58% of the instructions are executed in 0.75
µs and 40% in 1.5µs.
Multiply and divide instructions require 3
µs.
FEATURES
80C51 central processing unit
8k × 8 EPROM expandable externally to 64k bytes
An additional 16-bit timer/counter coupled to four capture registers
and three compare registers
Two standard 16-bit timer/counters
256 × 8 RAM, expandable externally to 64k bytes
Capable of producing eight synchronized, timed outputs
A 10-bit ADC with eight multiplexed analog inputs
Two 8-bit resolution, pulse width modulation outputs
Five 8-bit I/O ports plus one 8-bit input port shared with analog
inputs
I2C-bus serial I/O port with byte oriented master and slave
functions
Full-duplex UART compatible with the standard 80C51
On-chip watchdog timer
16MHz speed
Extended temperature ranges
OTP package available
ORDERING INFORMATION
EPROM
TEMPERATURE
°C AND PACKAGE
FREQ
MHz
DRAWING NUMBER
S87C552-4A68
0 to +70, Plastic Leaded Chip Carrier
16
SOT188-3
S87C552-4BA
0 to +70, Plastic Quad Flat Pack
16
SOT318-2
S87C552-5A68
–40 to +85, Plastic Leaded Chip Carrier
16
SOT188-3
NOTE:
1. For ROM and ROMless see data sheet 80C552/83C552


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