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DS1972-F5 Datasheet(PDF) 11 Page - Maxim Integrated Products |
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DS1972-F5 Datasheet(HTML) 11 Page - Maxim Integrated Products |
11 / 23 page DS1972: 1024-Bit EEPROM iButton 11 of 23 Figure 7-3. Memory Function Flow Chart (continued) * 1-Wire idle high for power From Figure 7 2 nd Part To Figure 7 2 nd Part To Figure 7 4 th Part From Figure 7 4 th Part 55h Copy Scratch- Pad ? Bus Master TX TA1 (T7:T0), TA2 (T15:T8) and E/S Byte Y N Bus Master RX “1”s Master TX Reset ? Y N Y Auth. Code Match ? N N Copy- Protected ? Y DS1972 copies Scratch- pad Data to Address AA = 1 * DS1972 TX “0” Master TX Reset ? Master TX Reset ? Y N DS1972 TX “1” N Y Applicable to all R/W memory locations. Y T15:T0 < 0090h ? N PF = 0 ? Y N Duration: tPROG |
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