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ADS5521IPAPR Datasheet(PDF) 6 Page - Burr-Brown (TI) |
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ADS5521IPAPR Datasheet(HTML) 6 Page - Burr-Brown (TI) |
6 / 20 page ADS5521 SBAS309 − MAY 2004 www.ti.com 6 TIMING CHARACTERISTCS 16.5 Clock Cycles Input Clock Output Clock Data Out (D0−D11) Analog Input Signal Sample N N+ 1 N+ 2 N+ 3 N+4 N+ 15 N+ 1 6 N+1 7 N − 17 N − 16 N − 15 N − 13 N − 3N − 2N − 1N t A t SETUP t HOLD Data Invalid t PDI NOTE: It is recommended that the loading at CLKOUT and all data lines are accurately matched to ensure that the above timing matches closely with the specified values. Figure 1. Timing Diagram TIMING CHARACTERISTICS Typ, min, and max values at TA = +25°C, full temperature range is TMIN = −40°C to tMAX = +85°C, sampling rate = 105MSPS, 50% clock duty cycle, AVDD = DRVDD = 3.3V, DLL On, −1dBFS differential input, and 3VPP differential clock, unless otherwise noted. PARAMETER DESCRIPTION MIN TYP MAX UNIT Switching Specification Aperture delay, tA Input CLK falling edge to data sampling point 1 ns Aperture jitter (uncertainty) Uncertainty in sampling instant 300 fs Data setup time, tSETUP Data valid to 50% of CLKOUT rising edge TBD ns Data hold time, tHOLD CLKOUT rising edge to data becoming invalid TBD ns Data latency, tD(Pipe) Input clock falling edge (on which sampling takes place) to input clock rising edge (on which the corresponding data is given out) 16.5 Clock Cycles Propagation delay, tPDI Input clock rising edge to data valid TBD ns Data rise time Data out 20% to 80% 2.5 ns Data fall time Data out 80% to 20% 2.5 ns Output enable (OE) to output stable delay 2 ms SERIAL PROGRAMMING INTERFACE CHARACTERISTICS The device has a three-wire serial interface. The device latches the serial data SDATA on the falling edge of serial clock SCLK when SEN is active. D Serial shift of bits is enabled when SEN is low. SCLK shifts serial data at falling edge. D Minimum width of data stream for a valid loading is 16 clocks. D Data is loaded at every 16th SCLK falling edge while SEN is low. D In case the word length exceeds a multiple of 16 bits, the excess bits are ignored. D Data can be loaded in multiple of 16-bit words within a single active SEN pulse. |
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