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TDA8769 Datasheet(PDF) 3 Page - NXP Semiconductors |
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TDA8769 Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 28 page  2003 Dec 09 3 Philips Semiconductors Objective specification 12-bit, 60/80/105 Msps Analog-to-Digital Converter (ADC) Nyquist/high IF sampling TDA8769 1 FEATURES • 12-bit resolution • Optimized for both Nyquist and high IF sampling • High-speed sampling rate up to 105 MHz • Maximum analog input frequency of 330 MHz (see Application section) • Only 2 clock cycles latency • 5 V power supplies and 3.3 V output power supply • Binary or two’s-complement CMOS outputs • Programmable Complete Conversion Signal (CCS) CMOS output • In-range CMOS compatible output • CMOS compatible static digital inputs • LVTTL and LVCMOS compatible digital outputs • Differential clock input PECL; sine wave and TTL compatible • Integrated track-and-hold amplifier • Differential analog input • External amplitude range control • Full-scale controllable from 1.5 to 1.9 V (p-p) • Voltage controlled regulator included • Temperature range from −40 to +85 °C. 2 APPLICATIONS • Cellular infrastructure (2.5G, 3G, etc.) • Base stations and “Zero-IF” or direct IF sampling subsystems • Wireless and wired broadband communications • Wireless Local Loop (WLL) • Local Multipoint Distribution Service (LMDS) • Advanced Frequency Modulation (FM) radio • Imaging (camera scanner and medical) • Cable modem or set top box • Radar and satellite hub systems. 3 GENERAL DESCRIPTION The TDA8769 is a BiCMOS 12-bit Analog-to-Digital Converter (ADC) optimized for GSM/EDGE, W-CDMA and CDMA2000 radio transceivers, high data rate radios and other applications such as advanced FM radio and professional imaging. Its main innovation is the RF sampling, based on a high-speed clock of up to 105 Msps combined with high input frequencies of up to 250 MHz. It converts the analog input signal into 12-bit binary coded digital words at a maximum sampling rate of 105 MHz. The TDA8769 analog performances have been proven in various multi-carrier 3G radio receivers, providing the best-in-class Adjacent Channel Selectivity (ACS) up to 80 dB. Moreover the TDA8769 offers the lowest clock cycle latency, which enables competitive and optimized feedback loops in controlled systems. All static digital inputs (TH, CEN, OTC, DEL0 and DEL1) are CMOS compatible and all outputs are LVTTL and LVCMOS compatible. A sine wave clock input signal can also be used. 4 QUICK REFERENCE DATA Tbf. 5 ORDERING INFORMATION TYPE NUMBER PACKAGE SAMPLING FREQUENCY (MHz) NAME DESCRIPTION VERSION TDA8769HW/6 HTQFP48 plastic thermal enhanced thin quad flat package; 48 leads; body 7 × 7 × 1.0 mm; heatsink SOT545-2 60 TDA8769HW/8 80 TDA8769HW/10 105 |
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