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AD9910 Datasheet(PDF) 11 Page - Analog Devices

Part # AD9910
Description  1 GSPS 14-Bit, 3.3V CMOS Direct Digital Synthesizer
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9910 Datasheet(HTML) 11 Page - Analog Devices

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PRELIMINARY TECHNICAL DATA
AD9910
Rev. PrD| Page 11 of 13
RAM MODULATION MODE
In RAM modulation mode (Figure 5) the modulated DDS sig-
nal control parameter(s) are supplied directly from RAM. The
RAM contains 1024 32-bit words. It provides a very flexible
method for generating arbitrary, time-dependent data patterns.
The rate at which words are extracted from the RAM is con-
trolled by a programmable timer. Thus, each word can be
thought of as a 32-bit sample, which successive samples deliv-
ered at a sample rate determined by the programmable timer.
The destination of the samples is also under program control.
That is, the sample can be routed to any of the three DDS con-
trol parameters; frequency, phase, and amplitude. The ability to
generate a time-dependent amplitude, phase, or frequency sig-
nal enables modulation of any one of the parameters controlling
the DDS carrier signal. In addition, a polar modulation format
is also available, in which each RAM sample is partitioned into
a magnitude and phase component: 16 bits phase allocated to
phase and 14 bits allocated to magnitude.
NOTE: When the OSK function is enabled, its amplitude data
overrides any RAM data that is destined for the DDS amplitude
control parameter.
Figure 5: RAM modulation mode
LINEAR RAMP MODULATION MODE
In linear ramp modulation mode (Figure 6), the modulated
DDS signal control parameter is supplied directly from Linear
Ramp Generator. The ramp generation parameters are con-
trolled via the serial I/O port.
The ramp generation parameters allow the user to control both
the rising and falling slopes of the ramp. The upper and lower
boundaries of the ramp, the step size and step rate of the rising
portion of the ramp, and the step size and step rate of the falling
portion of the ramp are all programmable.
The ramp is digitally generated with 32-bit output resolution.
The 32-bit output of the Linear Ramp Generator can be pro-
grammed to represent frequency, phase, or amplitude. When
programmed to represent frequency all 32 bits are used. How-
ever, when programmed to represent phase or amplitude, only
the 16 MSBs or 14 MSB, respectively, are used.
The ramp direction (rising/falling) is controlled externally by
the LSCTL pin. An additional pin (LSHOLD) allows the user to
freeze the ramp generator at its present state.
NOTE: When the OSK function is enabled, its amplitude data
overrides any Linear Ramp data that is destined for the DDS am-
plitude control parameter.


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