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ADIS16251ACCZ Datasheet(PDF) 4 Page - Analog Devices |
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ADIS16251ACCZ Datasheet(HTML) 4 Page - Analog Devices |
4 / 20 page ADIS16251 Preliminary Technical Data Rev. PrA | Page 4 of 20 DAC OUTPUT 5 kΩ/100 pF to GND Resolution 12 Bits Relative Accuracy For Code 101 to Code 4095 4 LSB Differential Nonlinearity 1 LSB Offset Error ±5 mV Gain Error ±0.5 % Output Range 0 to 2.5 V Output Impedance 2 Ω Output Settling Time 10 μs LOGIC INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V For CS signal when used to wake up from SLEEP mode 0.55 V Logic 1 Input Current, IINH VIH = 3.3 V ±0.2 ±10 μA Logic 0 Input Current, IINL VIL = 0 V 40 60 μA Logic 0 Output Current (RST )2 1 mA Input Capacitance, CIN 10 pF DIGITAL OUTPUTS Output High Voltage, VOH ISOURCE = 1.6 mA 2.4 V Output Low Voltage, VOL ISINK = 1.6 mA 0.4 V SLEEP TIMER Timeout Period3 0.5 128 Sec FLASH MEMORY Endurance4 20,000 Cycles Data Retention5 TJ = 55°C 20 Years CONVERSION RATE Minimum Conversion Time 3.906 ms Maximum Conversion Time 7.75 Sec Maximum Throughput Rate 256 SPS Minimum Throughput Rate 0.129 SPS POWER SUPPLY Operating Voltage Range VCC 4.75 5.0 5.25 V Power Supply Current Normal mode at 25°C 15 19 mA Fast mode at 25°C 41 48 mA Sleep mode at 25°C 500 750 μA 1 The sensor is capable of +600 °/sec but the specifications herein are for +80°/sec only. 2 The RST pin has an internal pull-up 3 Guaranteed by design. 4 Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C. 5 Retention lifetime equivalent at junction temperature (TJ) 55°C as per JEDEC Standard 22 Method A117. Retention lifetime decreases with junction temperature. |
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