UCC28500, UCC28501, UCC28502, UCC28503

UCC38500, UCC38501, UCC38502, UCC38503

SLUS419C − AUGUST 1999 − REVISED NOVEMBER 2001

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TYPICAL APPLICATION

The UCC38500 series is designed to incorporate all the control functions required for a power factor correction

circuit and a second stage dc-to-dc converter. The PFC function is implemented as a full-feature,

average-current-mode controller integrated circuit. In addition, the input voltage feedforward function is

implemented in a simplified manner. Current from IAC input is mirrored over to the VFF pin. By simply adding

a resistor and capacitor (to attenuate 120-Hz ripple) a voltage is developed which is proportional to RMS line

voltage, eliminating the need for several components normally connected to the line.

The UCC3850x uses leading-edge modulation for the PFC stage and trailing-edge modulation for the dc-to-dc

stage. This reduces ripple current in the output capacitor by reducing the overlap in conduction time of the PFC

and dc-to-dc switches. Figures 7 and 8 depict the ripple current reduction in the boost switch. In addition to the

reduced ripple current, noise immunity is improved through the current error amplifier implementation. Please

refer to the UCC3817 datasheet (TI Literature No. SLUS395) for a detailed explanation of current error amplifier

implementation.

UDG−97130−1

Figure 7. Simplified Representation of a 2−Stage PFC Power Supply

Figure 8. Timing Waveforms for Synchronization Scheme