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ADS1000 Datasheet(PDF) 5 Page - Analog Devices |
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ADS1000 Datasheet(HTML) 5 Page - Analog Devices |
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5 / 17 page  www.ti.com ANALOG-TO-DIGITAL CONVERTER RESET AND POWER-UP OUTPUT CODE CALCULATION I2C INTERFACE Output Code + 2048(PGA) V IN)*VIN− V DD CLOCK GENERATOR USING THE ADS1000 OPERATING MODES ADS1000 SBAS357 – SEPTEMBER 2006 THEORY OF OPERATION places the result in the output register, and The ADS1000 is a fully differential, 12-bit A/D immediately begins another conversion. When the converter. The ADS1000 allows users to obtain ADS1000 is in continuous conversion mode, the precise measurements with a minimum of effort, and ST/BSY bit in the configuration register always reads the device is extremely easy to design with and '1'. configure. In single conversion mode, the ADS1000 waits until The ADS1000 consists of an A/D converter core with the ST/BSY bit in the conversion register is set to '1'. adjustable gain, a clock generator, and an I2C When this happens, the ADS1000 powers up and interface. Each of these blocks are described in performs a single conversion. After the conversion detail in the sections that follow. completes, the ADS1000 places the result in the output register, resets the ST/BSY bit to '0' and powers down. Writing a '1' to ST/BSY while a conversion is in progress has no effect. The ADS1000 uses a switched-capacitor input stage. To external circuitry, it looks roughly like a When switching from continuous conversion mode to resistance. The resistance value depends on the single conversion mode, the ADS1000 will complete capacitor values and the rate at which they are the current conversion, reset the ST/BSY bit to '0' switched. The switching clock is generated by the and power-down the device. onboard clock generator, so its frequency, nominally 275kHz, is dependent on supply voltage and temperature. The capacitor values depend on the When the ADS1000 powers up, it automatically PGA setting. performs a reset. As part of the reset, the ADS1000 The common-mode and differential input impedances sets all of the bits in the configuration register to their are different. For a gain setting of PGA, the respective default settings. differential input impedance is typically 2.4M Ω/PGA. The ADS1000 responds to the I2C General Call The common-mode impedance is typically 8M Ω. Reset command. When the ADS1000 receives a General Call Reset, it performs an internal reset, exactly as though it had just been powered on. The ADS1000 outputs codes in binary two’s complement format. The output code is confined to the range of numbers: –2048 to 2047, and is given The ADS1000 communicates through an I2C by: (Inter-Integrated Circuit) interface. The I2C interface is a two-wire, open-drain interface supporting multiple devices and masters on a single bus. Devices on the I2C bus only drive the bus lines low, by connecting them to ground; they never drive the bus lines high. Instead, the bus wires are pulled high by pull-up resistors, so the bus wires are high when The ADS1000 features an onboard clock generator. no device is driving them low. This way, two devices The Typical Characteristics show variations in data cannot conflict; if two devices drive the bus rate over supply voltage and temperature. It is not simultaneously, there is no driver contention. possible to operate the ADS1000 with an external clock. Communication on the I2C bus always takes place between two devices, one acting as the master and the other acting as the slave. Both masters and slaves can read and write, but slaves can only do so under the direction of the master. Some I2C devices can act as masters or slaves, but the ADS1000 can The ADS1000 operates in one of two modes: only act as a slave device. continuous conversion and single conversion. In continuous conversion mode, the ADS1000 continuously performs conversions. Once a conversion has been completed, the ADS1000 5 |
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