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ADS1000A1IDBVR Datasheet(PDF) 6 Page - Analog Devices |
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ADS1000A1IDBVR Datasheet(HTML) 6 Page - Analog Devices |
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6 / 17 page  www.ti.com ADS1000 SBAS357 – SEPTEMBER 2006 An I2C bus consists of two lines, SDA and SCL. SDA 10-bit addresses; see the I2C specification for carries data; SCL provides the clock. All data is details.) The master sends an address in the transmitted across the I2C bus in groups of eight bits. address byte, together with a bit that indicates To send a bit on the I2C bus, the SDA line is driven whether it wishes to read from or write to the slave to the bit level while SCL is low (a Low on SDA device. indicates the bit is '0'; a High indicates the bit is '1'). Every byte transmitted on the I2C bus, whether it be Once the SDA line has settled, the SCL line is address or data, is acknowledged with an brought high, then low. This pulse on SCL clocks the acknowledge bit. When a master has finished SDA bit into the receiver shift register. sending a byte, eight data bits, to a slave, it stops The I2C bus is bidirectional: the SDA line is used driving SDA and waits for the slave to acknowledge both for transmitting and receiving data. When a the byte. The slave acknowledges the byte by pulling master reads from a slave, the slave drives the data SDA low. The master then sends a clock pulse to line; when a master sends to a slave, the master clock the acknowledge bit. Similarly, when a master drives the data line. The master always drives the has finished reading a byte, it pulls SDA low to clock line. The ADS1000 never drives SCL, because acknowledge to the slave that it has finished reading it cannot act as a master. On the ADS1000, SCL is the byte. It then sends a clock pulse to clock the bit. an input only. (Remember that the master always drives the clock line.) Most of the time the bus is idle, no communication takes place, and both lines are high. When A not-acknowledge is performed by simply leaving communication takes place, the bus is active. Only SDA high during an acknowledge cycle. If a device is master devices can start a communication. They do not present on the bus, and the master attempts to this by causing a start condition on the bus. address it, it will receive a not-acknowledge because Normally, the data line is only allowed to change no device is present at that address to pull the line state while the clock line is low. If the data line low. changes state while the clock line is high, it is either When a master has finished communicating with a a start condition or its counterpart, a stop condition. slave, it may issue a stop condition. When a stop A start condition is when the clock line is high and condition is issued, the bus becomes idle again. A the data line goes from high to low. A stop condition master may also issue another start condition. When is when the clock line is high and the data line goes a start condition is issued while the bus is active, it is from low to high. called a repeated start condition. After the master issues a start condition, it sends a A timing diagram for an ADS1000 I2C transaction is byte that indicates with which slave device it wants to shown in Figure 6. Table 1 gives the parameters for communicate. This byte is called the address byte. this diagram. Each device on an I2C bus has a unique 7-bit address to which it responds. (Slaves can also have 6 |
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