MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

1

REV 7

2/97

Octal 3-State Noninverting

D Flip-Flop with

LSTTL-Compatible Inputs

High–Performance Silicon–Gate CMOS

The MC54/74HCT374A may be used as a level converter for

interfacing TTL or NMOS outputs to High–Speed CMOS inputs.

The HCT374A is identical in pinout to the LS374.

Data meeting the setup and hold time is clocked to the outputs with the

rising edge of Clock. The Output Enable does not affect the state of the

flip–flops, but when Output Enable is high, the outputs are forced to the

high–impedance state. Thus, data may be stored even when the outputs

are not enabled.

The HCT374A is identical in function to the HCT574A, which has the

input pins on the opposite side of the package from the output pins. This

device is similar in function to the HCT534A, which has inverting outputs.

• Output Drive Capability: 15 LSTTL Loads

• TTL/NMOS–Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 276 FETs or 69 Equivalent Gates

• Improvements over HCT374

— Improved Propagation Delays

— 50% Lower Quiescent Power

— Improved Input Noise and Latchup Immunity

Design Criteria

Value

Units

Internal Gate Count*

69

ea.

Internal Gate Propagation Delay

1.5

ns

Internal Gate Power Dissipation

5.0

µW

Speed Power Product

.0075

pJ

* Equivalent to a two–input NAND gate.

MC54/74HCT374A

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Output

Output

Enable

Clock

D

Q

LH

H

LL

L

L

L,H,

X

No Change

HX

X

Z

X = don’t care

Z = high impedance

Q2

D1

D0

Q0

OUTPUT

ENABLE

GND

Q3

D3

D2

Q1

5

4

3

2

1

10

9

8

7

6

14

15

16

17

18

19

20

11

12

13

Q6

D6

D7

Q7

VCC

CLOCK

Q4

D4

D5

Q5

DW SUFFIX

SOIC PACKAGE

CASE 751D–04

N SUFFIX

PLASTIC PACKAGE

CASE 738–03

ORDERING INFORMATION

MC54HCTXXXAJ

MC74HCTXXXAN

MC74HCTXXXADW

MC74HCTXXXASD

MC74HCTXXXADT

Ceramic

Plastic

SOIC

SSOP

TSSOP

DT SUFFIX

TSSOP PACKAGE

CASE 948E–02

J SUFFIX

CERAMIC PACKAGE

CASE 732–03

1

20

1

20

SD SUFFIX

SSOP PACKAGE

CASE 940C–03

1

20

1

20

1

20

LOGIC DIAGRAM

DATA

INPUTS

D0

11

CLOCK

D1

D2

D3

D4

D5

D6

D7

18

17

14

13

8

7

4

3

1

OUTPUT ENABLE

19

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

16

15

12

9

6

5

2

PIN 20 = VCC

PIN 10 = GND

NONINVERTING

OUTPUTS