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UCD9112 Datasheet(PDF) 5 Page - Texas Instruments |
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UCD9112 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 29 page UCD9112 SEPEMBER 2006 5 www.ti.com 1.2 PIN ASSIGNMENTS Figure 1-3. UCD9112 QFN Package Pin Assignments 1.3 PIN FUNCTIONS Table 1.1 UCD9112 Pin Descriptions TERMINAL PIN NAME NO. I/O A/D DESCRIPTION ADDR1 1 I A ADDR0 2 I A Addr1 and Addr0 signals are analog voltage that are sampled when UCD9112 is released from reset. The voltage levels set the addresses. See the below section, PMBus Address. IOUT_0 3 I A Phase 0 inductor current, the value is amplified in UCD7230 VIN 4 I A Input DC voltage sensing through resistors. VOUT 5 I A Output DC voltage sensing through resistors. IOUT_1 6 I A Phase 1 inductor curren sensing, the value is amplified in UCD7230. NC 7 - - Open connection. NC 8 - - Open connection. DVSS 9 - DP Digital ground of IC. This ground should be separate from power ground. VD25 10 O P Internal 2.5V bypass pin for UCD9112. A 1μF ceramic cap must be connected from VD25 to DVSS. RST 11 I - Pulling high resets the chip. Need a pull-down resistor and a 0.1μF decoupling capacitor. DUM 12 - - Connected to analog ground AVSS. NC 13 - - No connection. |
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