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MF0096M-05AAXX Datasheet(PDF) 3 Page - Mitsubishi Electric Semiconductor |
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MF0096M-05AAXX Datasheet(HTML) 3 Page - Mitsubishi Electric Semiconductor |
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3 / 32 page  MITSUBISHI STORAGE CARD Preliminary MF0XXXX-05AAXX series CompactFlash CARDS MITSUBISHI ELECTRIC 3 June.2001. Rev. 1.3 Signal Description Signal Name I/O Pin No. Description Address bus[A10-A0] I 8, 10, 11, 12, 14, 15, 16, 17, 18, 19, 20 Signals A10-A0 are address bus. A0 is invalid in word mode. A10 is the MSB and A0 is the LSB. Data bus[D15-D0] I/O 31, 30, 29, 28, 27, 49, 48, 47, 6, 5, 4, 3, 2, 23, 22, 21 Signals D15-D0 are data bus. D0 is the LSB of the Even Byte of the Word. D8 is the LSB of the Odd Byte of the Word. Card Enable[CE1#, CE2#] (PC Card Memory Mode) Card Enable[CE1#, CE2#] (PC Card I/O Mode) CE1# and CE2# are low active card select signals. Chip Select[CS0#, CS1#] (True IDE Interface) I 7, 32 In True IDE Interface, CS0# is used to select the Command Block Registers. CS1# is used to select the Control Block Registers. Output Enable[OE#] (PC Card Memory Mode) OE# is used to gate Attribute and Common Memory Read data from the Card. Output Enable[OE#] (PC Card I/O Mode) OE# is used to gate Attribute Memory Read data from the Card. ATA SEL# (True IDE Interface) I 9 To enable True IDE Interface, this input should be grounded by the host. Write Enable[WE#] (PC Card Memory Mode) WE# is used for strobing Attribute and Common Memory Write data into the Card. Write Enable[WE#] (PC Card I/O Mode) WE# is used for strobing Attribute Memory Write data into the Card. Write Enable[WE#] (True IDE Interface) I 36 This input should be connected Vcc by the host. I/O Read[IORD#] (PC Card I/O Mode) I/O Read[IORD#] (True IDE Interface) I 34 IORD# is used to read data from the Card’s I/O space. I/O Write[IOWR#] (PC Card I/O Mode) I/O Write[IOWR#] (True IDE Interface) I 35 IOWR# is used to write data to the Card’s I/O space. Ready[READY] (PC Card Memory Mode) READY signal is set high when the Card is ready to accept a new data transfer operation. IREQ# (PC Card I/O Mode) This signal of low level is indicates that the card is requesting software service to host, and high level indicates that the card is not requesting. INTRQ (True IDE Interface) O 37 This signal is active high interrupt request to the host. Card Detection[CD1#, CD2#] O 26, 25 CD1# and CD2# provided for proper detection of Card insertion. Write Protect[WP] (PC Card Memory Mode) This signal is held low because this card does not have a write protect switch. IOIS16# (PC Card I/O Mode) IOCS16# (True IDE Interface) O 24 This output signal is asserted when the I/O port address is capable of 16-bit access. |
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