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TDA4865AJ Datasheet(PDF) 10 Page - NXP Semiconductors |
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TDA4865AJ Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 18 page TDA4865J_TDA4865AJ_2 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 02 — 3 November 2006 10 of 18 NXP Semiconductors TDA4865J; TDA4865AJ Vertical deflection booster 12.1 Example for both TDA4865J and TDA4865AJ [1] Flyback voltage measured against 0 V; for TDA4865J only. Remark: the heat sink of the IC must be isolated against ground of the application (it is connected to pin GND). (1) With CS2 (typical value between 47 nF and 150 nF) the flyback time and the noise behavior can be optimized. (2) With R5 capacitor CF will be charged during scan and the value (typical value between 150 Ω and 270 Ω) depends on Idefl, tflb and CF. (3) R6 reduces the power dissipation of the IC. The maximum possible value depends on the application. Fig 8. Application diagram with TDA4865AJ 001aad304 3.9 Ω (2 W) 240 Ω (2 W) 100 µF 470 µF CF R5(2) D1 TDA4865AJ R6(3) 7 INP INN VOUT GND VP2 VP1 VP3 65 4 3 2 1 DIFFERENTIAL INPUT STAGE VERTICAL OUTPUT FLYBACK GENERATOR REFERENCE CIRCUIT THERMAL PROTECTION BYV27 470 µF +12.5 V −12.5 V VP VN 5.6 Ω 1.8 k Ω 1.8 k Ω 5.6 Ω 270 Ω 0.5 Ω (1 W) 100 nF RS1 RS2 CS1 CS2(1) RP R3 R2 R1 deflection coil from deflection controller Table 8. Values given from application Symbol Value Unit Idefl(max)(M) 1.6 (peak value) A Ldeflcoil 10 mH Rdeflcoil 4 Ω RP 270 Ω R1 0.5 Ω R2 1.8 k Ω R3 1.8 k Ω VF[1] 50 V Tamb 50 °C Tdeflcoil 75 °C Rth(j-mb) 4 K/W Rth(mb-h) 0.5 K/W Rth(h-a) 2 K/W |
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