Data Sheet
February 1998
T7237 ISDN U-Interface Transceiver
Lucent Technologies Inc.
7
Pin Information (continued)
Table 1. Pin Descriptions (continued)
* Iu = input with internal pull-up; Id = input with internal pull-down.
Pin
Symbol
Type*
Name/Function
7
TDMDI
Iu
TDM Data In. If TDMEN = 0 (register GR2, bit 5), this pin is the TDM bus 2B+D data
input synchronous with TDMCLK. An internal 100 k
Ω pull-up resistor is on this pin.
8
TDMDO
O
TDM Data Out. If TDMEN = 0, this pin is the 2.048 MHz TDM bus 2B+D data output
synchronous with TDMCLK.
9
TDMCLK
O
TDM Clock. If TDMEN = 0, this pin is the 2.048 MHz TDM clock output synchronous
with U-interface (if active) or is free-running.
11
INT
O
Serial Interface Microprocessor Interrupt (Active-Low). Interrupt output for micro-
processor. Any active, unmasked bit in interrupt registers UIR0 or MIR0 will cause INT
to go low. The bits in the interrupt registers UIR0 and MIR0 will be set on a true condi-
tion, independent of the state of the corresponding mask bits. If a masked, active inter-
rupt bit is subsequently unmasked, the INT pin will go low to indicate an interrupt for that
condition. Reading UIR0 or MIR0 clears the entire register and forces INT high for
50
µs. After this interval, INT will again reflect the state of any unmasked bit in these
registers. The global interrupt register (GIRO) provides a summary status of the UIR0
and MIR0 interrupt registers and indicates if one of the registers currently has an active,
unmasked interrupt bit.
12
SDI
Id
Serial Interface Data Input. Data input for microprocessor interface.
14
SDO
O
Serial Interface Data Output. Data output for microprocessor interface. This pin is
3-stated at all times except for when a microprocessor read from the T7237 is taking
place.
15
SCK
Id
Serial Interface Clock. Clock input for microprocessor interface.
17
CKOUT
O
Clock Output. Clock output function to drive other board components. Powerup default
state is high impedance to minimize power consumption. Programmable via micropro-
cessor register (register GR0, bits 1 and 2) to provide 15.36 MHz output or 10.24 MHz
output. If U-interface is active, the 10.24 MHz output is synchronous with U-interface
timing.
18
GNDO
—
Crystal Oscillator Ground. Ground lead for crystal oscillator.
19
VDDO
—
Crystal Oscillator Power. Power supply lead for crystal oscillator.
20
X1
O
Crystal #1. Crystal connection #1 for 15.36 MHz oscillator.
21
X2
I
Crystal #2. Crystal connection #2 for 15.36 MHz oscillator.