Summary description

M36L0R7060U1, M36L0R7060L1, M36L0R7050U1, M36L0R7050L1

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Summary description

The M36L0R7060U1, M36L0R7060L1, M36L0R7050U1 and M36L0R7050L1 combine two

memory devices in a Multi-Chip Package:

●

a 128-Mbit, Multiple Bank Flash memory, the M58LR128G(U/L)

●

a 32 or 64 Mbit PseudoSRAM, the M69KM048AA or M69KM096AA, respectively.

The purpose of this document is to describe how the two memory components operate with

respect to each other. It must be read in conjunction with the M58LRxxxGUL and

M69KM048AA or M69KM096AA datasheets, where all specifications required to operate

the Flash memory and PSRAM components are fully detailed. These datasheets are

available from the STMicroelectronics website: www.st.com.

Recommended operating conditions do not allow more than one memory to be active at the

same time.

The memory is offered in a Stacked TFBGA88 (8 ×10mm, 8 × 10 ball array, 0.8mm pitch)

package.

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. These packages have a Lead-free second-level interconnect. The category of

Second-Level Interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97.

The maximum ratings related to soldering conditions are also marked on the inner box label.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.