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SN74ALS229BN Datasheet(PDF) 3 Page - Texas Instruments |
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SN74ALS229BN Datasheet(HTML) 3 Page - Texas Instruments |
3 / 12 page SN74ALS229B 16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS090 – MARCH 1990 – REVISED JUNE 1992 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) 1A, 3D 5 D0 6 D1 7 D2 8 D3 9 D4 Q0 16 2A Q1 15 Q2 14 Q3 13 Q4 12 C3 EN 3 2 19 17 FULL FULL–2 EMPTY+2 EMPTY RAM 16 × 5 1A 16 2A 16 1 16 1 16 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 + CT = 1 COMP P = Q P = Q + 2 P = Q – 2 P Q 16 16 S R 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 + CT = 1 18 UNCK C1 1D S R 4 LDCK C1 1D 11 RST 1 OE Ring Counter CTR DIV 16 Write Address Read Address 16 Ring Counter CTR DIV 16 Pin numbers shown are for the DW and N packages. |
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