Rev. 2.2 - 4/29/98
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Features
n High speed access times
Com’l: 10, 12 and 15 ns
Ind’l: 12 and 15 ns
n Low power operation (typical)
- PDM41028SA
Active: 400 mW
Standby: 150 mW
- PDM41028LA
Active: 350 mW
Standby: 100 mW
n Single +5V (±10%) power supply
n TTL-compatible inputs and outputs
n Packages
Plastic SOJ (300 mil) - TSO
Plastic SOJ (400 mil) - SO
Description
The PDM41028 is a high-performance CMOS static
RAM organized as 262,144 x 4 bits. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
Reading is accomplished when WE remains HIGH
and CE and OE are both LOW.
The PDM41028 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41028 comes in two versions,
the standard power version PDM41028SA and a low
power version the PDM41028LA. The two versions
are functionally the same and only differ in their
power consumption.
The PDM41028 is available in a 28-pin 300-mil SOJ,
and a 28-pin 400-mil SOJ for surface mount
applications.
A
•
•
•
•
•
A
0
17
I/O
I/O
I/O
I/O
0
1
2
3
CE
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Addresses
Decoder
Memory
Matrix
Input
Data
Control
Column I/O
•••••
OE
WE
Functional Block Diagram
PDM41028
1 Megabit Static RAM
256K x 4-Bit
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